Inventor
Dal-Hee Lee
Inventor
Seoul, KR
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing19%
H01LSemiconductor devices17%
H10DInorganic electric semiconductor devices15%
H03KPulse technique13%
G11CStatic stores6%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
G01RMeasuring electric variables4%
A47LDomestic washing or cleaning2%
G01DMeasuring not specially adapted for a specific variable2%
G02FOptical devices or arrangements for the control of light by modification of the optical properties of the media of the elements involved therein2%
PatentTitleYear
11,129,511Vacuum cleaner202111,133,080Memory device and test operation method thereof202111,121,193Electronic panel and electronic apparatus including the same202111,099,450Electrochromic device202111,069,387Memory system and method of operating the memory system202111,063,304Secondary battery having symmetric multi-tabs202111,062,742Memory system capable of improving stability of a data read operation of interface circuit, and method of operating the memory system202110,651,201Integrated circuit including interconnection and method of fabricating the same, the interconnection including a pattern shaped and/or a via disposed for mitigating electromigration202010,553,574Standard cell for removing routing interference between adjacent pins and device including the same202010,429,443Scan flip-flop and scan test circuit including the same201910,192,860Engineering change order (ECO) cell, layout thereof and integrated circuit including the ECO cell201910,108,772Methods of generating integrated circuit layout using standard cell library20189,960,768Integrated circuit and semiconductor device including the same20189,831,877Integrated circuit and semiconductor device including the same20179,753,086'Scan flip-flop and scan test circuit including the same'20179,665,678'Method and program for designing integrated circuit'20179,460,259'Methods of generating integrated circuit layout using standard cell library'20169,379,705'Integrated circuit and semiconductor device including the same'20168,952,423'Semiconductor device having decoupling capacitors and dummy transistors'2015Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2015–2021Patents assigned to SAMSUNG ELECTRONICS CO LTD (13)· patent assignee history
2015–2021Based in Seoul, KR· patent location history
2017Patents assigned to CHO SUNG-WEE (1)· patent assignee history
2017Patents assigned to KIM HA-YOUNG (1)· patent assignee history
2017Patents assigned to LEE DAL-HEE (1)· patent assignee history
2021Patents assigned to SK HYNIX INC (3)· patent assignee history
2021Based in Suwon-si, KR· patent location history
2021Based in Daejeon, KR· patent location history
2021Based in Yongin-si, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 13 | 2015–2021 |
| SK HYNIX INC | 3 | 2021 |
| CHO SUNG-WEE | 1 | 2017 |
| KIM HA-YOUNG | 1 | 2017 |
| LEE DAL-HEEself | 1 | 2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Seoul, KR | 15 | 2015–2021 |
| Suwon-si, KR | 2 | 2021 |
| Daejeon, KR | 1 | 2021 |
| Yongin-si, KR | 1 | 2021 |