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Inventor

Jing Chen

Inventor
Shanghai, CN

Overview

25→
Patents
2012–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 25 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices52%
H01LSemiconductor devices17%
G06FElectric digital data processing7%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
G11CStatic stores5%
H10BElectronic memory devices5%
G01RMeasuring electric variables2%
H10KOrganic electric solid-state devices2%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h102%
PatentTitleYear
10,553,687Semiconductor device having conductive feature overlapping an edge of an active region202010,290,714Transistor structure with field plate for reducing area thereof201910,269,959High voltage transistor structure and method20199,953,118Modeling method of SPICE model series of SOI FET20189,799,766'High voltage transistor structure and method'20179,761,494'Semiconductor structure and method of forming the same'20179,134,361'Method for determining BSIMSOI4 DC model parameters'20159,035,287'Polymeric materials for use in metal-oxide-semiconductor field-effect transistors'20158,937,354'PD SOI device with a body contact structure'20158,710,549'MOS device for eliminating floating body effects and self-heating effects'20148,667,440'TCAD emulation calibration method of SOI field effect transistor'20148,629,029'Vertical SOI bipolar junction transistor and manufacturing method thereof'20148,461,651'ESD protection devices for SOI integrated circuit and manufacturing method thereof'20138,450,195'Method of reducing floating body effect of SOI MOS device via a large tilt ion implantation'20138,422,288'DRAM cell utilizing floating body effect and manufacturing method thereof'20138,354,714'SOI MOS device having BTS structure and manufacturing method thereof'20138,354,310'SOI MOS device having a source/body ohmic contact and manufacturing method thereof'20138,350,298'Hybrid material inversion mode GAA CMOSFET'20138,330,229'Hybrid orientation inversion mode GAA CMOSFET'20128,330,228'Hybrid material inversion mode GAA CMOSFET'20128,324,035'Manufacturing method of SOI MOS device eliminating floating body effects'20128,274,119'Hybrid material accumulation mode GAA CMOSFET'20128,274,118'Hybrid material accumulation mode GAA CMOSFET'20128,264,042'Hybrid orientation accumulation mode GAA CMOSFET'20128,233,312'DRAM cell utilizing floating body effect and manufacturing method thereof'2012

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2012–2018Patents assigned to CHEN JING (19)· patent assignee history
2012–2018Patents assigned to WANG XI (19)· patent assignee history
2012–2015Patents assigned to SHANGHAI INST MICROSYS & INF (18)· patent assignee history
2012–2015Patents assigned to HUANG XIAOLU (10)· patent assignee history
2012–2018Patents assigned to LUO JIEXIN (9)· patent assignee history
2012–2018Based in Shanghai, CN· patent location history
2015Based in Skokie, IL, US· patent location history
2017Based in Hsinchu, TW· patent location history
2019–2020Based in Taipei, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
CHEN JINGself192012–2018
WANG XI192012–2018
SHANGHAI INST MICROSYS & INF182012–2015
HUANG XIAOLU102012–2015
LUO JIEXIN92012–2018
Locations
LocationPatentsSpan
Shanghai, CN192012–2018
Taipei, TW32019–2020
Hsinchu, TW22017
Skokie, Illinois, US12015