Inventor
DAVID ANDREW ROBERTS
Inventor
US
Overview
Patents· 44 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing58%
G11CStatic stores16%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use12%
G06NComputing arrangements based on specific computational models11%
G01RMeasuring electric variables4%
PatentTitleYear
12,561,077Multi-format data objects in memory202612,475,045Adaptive address tracking202512,450,160Delta predictions for page scheduling202512,449,978Access heatmap implementations at a host device202512,443,533Adaptive address tracking202512,430,264Selective cache line memory encryption202512,380,032Memory-aware pre-fetching and cache bypassing systems and methods202512,353,285Fast failure recovery of applications202512,333,186Systems and methods for continuous in-memory versioning202512,242,743Adaptive control for in-memory versioning202512,236,125Performance monitoring for a memory system202512,204,789Memory phase monitoring and scheduling system using memory usage statistics202512,175,127Techniques to generate access heatmaps at a memory device202412,094,531Caching techniques for deep learning accelerator202412,061,551Telemetry-capable memory sub-system202412,007,899Delta predictions for page scheduling202411,934,317Memory-aware pre-fetching and cache bypassing systems and methods202411,886,728Undo capability for memory devices202411,847,059Embedding data in address streams202311,836,084Embedding data in address streams202311,829,627Data migration schedule prediction using machine learning202311,797,198Memory instruction for memory tiers202311,797,439Balancing memory-portion accesses202311,775,458Multiple memory type shared memory bus systems and methods202311,775,370Memory fault map for an accelerated neural network202311,768,770Cache memory addressing202311,755,488Demand delay and data value correlated memory pre-fetching systems and methods202311,693,593Versioning data stored on memory device202311,693,775Adaptive cache202311,586,361Adaptive memory system202311,507,516Adaptive cache partitioning202211,507,443Memory fault map for an accelerated neural network202211,461,406System and method for identifying newly trending topics in a data stream202211,442,854Balancing memory-portion accesses202211,436,144Cache memory addressing202211,422,934Adaptive address tracking202211,409,657Adaptive address tracking202211,379,376Embedding data in address streams202211,354,246Memory-side transaction context memory interface systems and methods based on clock cycles and wires202211,334,260Adaptive memory system202211,294,808Adaptive cache202211,281,604Multiple memory type shared memory bus systems and methods202211,194,728Memory-aware pre-fetching and cache bypassing systems and methods202111,151,043Demand delay and data value correlated memory pre-fetching systems and methods2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to MICRON TECHNOLOGY INC (41)· patent assignee history
2021–2026Based in US· patent location history
2022Patents assigned to VERINT SYSTEMS UK LTD (1)· patent assignee history
2022Based in GB· patent location history
2024–2025Patents assigned to LODESTAR LICENSING GROUP LLC (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 41 | 2021–2026 |
| LODESTAR LICENSING GROUP LLC | 2 | 2024–2025 |
| VERINT SYSTEMS UK LTD | 1 | 2022 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 43 | 2021–2026 |
| GB | 1 | 2022 |