Inventor

Srikanth T. Srinivasan

Inventor
Portland, OR, US

Overview

40→
Patents
2003–2020
Patent span
Physics
Primary field (CPC G)

Patents· 40 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing70%
H03KPulse technique8%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use6%
G06NComputing arrangements based on specific computational models4%
G11CStatic stores4%
G01RMeasuring electric variables2%
G06GAnalogue computers2%
H03MCoding2%
H04LTransmission of digital information, e.g. telegraphic communication2%
PatentTitleYear
10,873,325Robust noise immune, low-skew, pulse width retainable glitch-filter202010,831,505Architecture and method for data parallel single program multiple data (SPMD) execution202010,776,110Apparatus and method for adaptable and efficient lane-wise tensor processing202010,763,839Buffer Circuit202010,713,217Method and system to managing persistent storage using perfect hashing202010,673,436Failsafe device202010,666,257Failsafe, ultra-wide voltage input output interface using low-voltage gate oxide transistors202010,649,807Method to check file data integrity and report inconsistencies with bulk data movement202010,534,747Technologies for providing a scalable architecture for performing compute operations in memory202010,418,098Methods and systems for performing a calculation across a memory array201910,235,180Scheduler implementing dependency matrix having restricted entries20199,904,553'Method and apparatus for implementing dynamic portbinding within a reservation station'20189,798,590'Post-retire scheme for tracking tentative accesses during transactional execution'20179,652,236'Instruction and logic for non-blocking register reclamation'20179,495,159'Two level re-order buffer'20169,372,698'Method and apparatus for implementing dynamic portbinding within a reservation station'20169,354,875'Enhanced loop streaming detector to drive logic optimization'20169,304,163'Methodology for testing integrated circuits'20169,305,049'Addressing cross-allocated blocks in a file system'20169,262,173'Critical section detection and prediction mechanism for hardware lock elision'20169,244,827'Store address prediction for memory disambiguation in a processing device'20169,229,943'Addressing cross-allocated blocks in a file system'20168,972,691'Addressing cross-allocated blocks in a file system'20158,965,938'Orphan management in file systems'20158,850,250'Integration of processor and input/output hub'20148,812,878'Limiting false wakeups of computing device components coupled via links'20148,782,456'Dynamic and idle power reduction sequence using recombinant clock and power gating'20148,627,030'Late lock acquire mechanism for hardware lock elision (HLE)'20148,190,859'Critical section detection and prediction mechanism for hardware lock elision'20127,958,336'System and method for reservation station load dependency matrix'20117,900,023'Technique to enable store forwarding during long latency instruction execution'20117,711,932'Scalable rename map table recovery'20107,487,337'Back-end renaming in a continual flow processor pipeline'20097,363,477'Method and apparatus to reduce misprediction penalty by exploiting exact convergence'20086,848,028'Microprocessor having a page prefetch cache for database applications'20056,829,680'Method for employing a page prefetch cache for database applications'20046,782,469'Runtime critical load/data ordering'20046,779,108'Incorporating trigger loads in branch histories for branch prediction'20046,760,816'Critical loads guided data prefetching'20046,662,273'Least critical used replacement with critical cache'2003

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2003–2020Patents assigned to INTEL CORP (27)· patent assignee history
2003–2005Based in Durham, NC, US· patent location history
2008–2020Based in Portland, OR, US· patent location history
2012–2019Patents assigned to SRINIVASAN SRIKANTH T (11)· patent assignee history
2012–2017Patents assigned to AKKARY HAITHAM (4)· patent assignee history
2012–2017Patents assigned to RAJWAR RAVI (4)· patent assignee history
2015–2016Patents assigned to IBM (4)· patent assignee history
2015–2016Based in Chennai, IN· patent location history
2016–2020Based in Bangalore, IN· patent location history
2020Based in Bengaluru, IN· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP272003–2020
SRINIVASAN SRIKANTH Tself112012–2019
AKKARY HAITHAM42012–2017
IBM42015–2016
RAJWAR RAVI42012–2017
Locations
LocationPatentsSpan
Portland, OR, US232008–2020
Durham, NC, US62003–2005
Bangalore, IN42016–2020
Bengaluru, IN32020
Chennai, IN32015–2016