Inventor
Ichiro Fujiwara
Inventor
Kanagawa, JP
Overview
Patents· 39 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices26%
H10BElectronic memory devices23%
G11CStatic stores19%
B82YSpecific uses or applications of nanostructures5%
H10NElectric solid-state devices not otherwise provided for3%
G21GConversion of chemical elements2%
H01LSemiconductor devices2%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation2%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h102%
PatentTitleYear
10,682,330Method for producing liposome encapsulating paclitaxel monoglycoside and/or docetaxel monoglycoside202010,074,690Semiconductor device and method of manufacturing the same20189,502,467'Semiconductor device and method of manufacturing the same'20168,685,786'Method of manufacturing a semiconductor memory device having a resistance change memory layer'20147,919,806'Nonvolatile semiconductor memory device and fabrication method therefor'20117,521,751'Nonvolatile memory device'20097,259,433'Non-volatile semiconductor memory device and method for producing same'20077,227,255'Semiconductor device and method of producing the same'20077,145,808'Nonvolatile semiconductor memory apparatus and method of producing the same'20067,142,451'Nonvolatile semiconductor memory apparatus and method of producing the same'20067,102,931'Nonvolatile semiconductor memory apparatus and method of producing the same'20067,088,622'Nonvolatile semiconductor memory apparatus and method of producing the same'20067,075,143'Apparatus and method for high sensitivity read operation'20067,049,180'Method of fabricating a memory transistor array utilizing insulated word lines as gate electrodes'20067,023,061'Memory transistor array utilizing insulated word lines as gate electrodes'20067,012,329'Memory transistor array utilizing insulated word lines as gate electrodes'20066,949,788'Nonvolatile semiconductor memory device and method for operating the same'20056,906,390'Nonvolatile semiconductor storage and method for manufacturing the same'20056,903,977'Nonvolatile semiconductor memory device and method of producing the same'20056,891,262'Semiconductor device and method of producing the same'20056,872,614'Nonvolatile semiconductor memory device and process of production and write method thereof'20056,870,765'Method of erasing non-volatile semiconductor memory device and such non-volatile semiconductor memory device'20056,794,712'Nonvolatile semiconductor memory device and process of production and write method thereof'20046,721,205'Nonvolatile semiconductor memory device and methods for operating and producing the same'20046,717,860'Method of erasing non-volatile semiconductor memory device and such non-volatile semiconductor memory device'20046,674,120'Nonvolatile semiconductor memory device and method of operation thereof'20046,541,326'Nonvolatile semiconductor memory device and process of production and write method thereof'20036,525,379'Memory device, method of manufacturing the same, and integrated circuit'20036,483,118'Positron source, method of preparing the same, and automated system for supplying the same'20026,434,053'Nonvolatile semiconductor memory device and method of operation thereof'20026,301,155'Non-volatile semiconductor memory device and method of reading same'20016,289,071'Positron source, method of preparing the same and automated system for supplying the same'20016,191,445'Nonvolatile semiconductor memory device and method of reading a data therefrom'20015,999,444'Nonvolatile semiconductor memory device and writing and erasing method of the same'19995,777,977'Recording and reproducing apparatus'19985,098,851'Fabricating a semiconductor photodetector by annealing to smooth the PN junction'19924,816,890'Optoelectronic device'19894,634,821'Switching apparatus for a time switch'19874,332,139'Method for storage and recovery of thermal energy'1982Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1982Patents assigned to AGENCY IND SCIENCE TECHN (1)· patent assignee history
1987Based in Hiroshima, JP· patent location history
1989–1992Patents assigned to HITACHI LTD (2)· patent assignee history
1989–1992Based in Kawasaki, JP· patent location history
1998–2018Patents assigned to SONY CORP (31)· patent assignee history
1998–2018Based in Kanagawa, JP· patent location history
2001–2002Patents assigned to RIKEN (2)· patent assignee history
2001–2002Based in Osaka, JP· patent location history
2006–2020Patents assigned to FUJIWARA ICHIRO (2)· patent assignee history
2020Based in Okayama, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SONY CORP | 31 | 1998–2018 |
| FUJIWARA ICHIROself | 2 | 2006–2020 |
| HITACHI LTD | 2 | 1989–1992 |
| RIKEN | 2 | 2001–2002 |
| AGENCY IND SCIENCE TECHN | 1 | 1982 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kanagawa, JP | 32 | 1998–2018 |
| Osaka, JP | 2 | 2001–2002 |
| Kawasaki, JP | 2 | 1989–1992 |
| Okayama, JP | 1 | 2020 |
| Hiroshima, JP | 1 | 1987 |