Inventor
Zhenrong Jin
Inventor
Essex Junction, VT, US
Overview
Patents· 31 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Lprimary
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses35%
G06FElectric digital data processing30%
H03KPulse technique7%
H05KPrinted circuits7%
H01QAntennas, i.e. radio aerials6%
H10DInorganic electric semiconductor devices6%
G01RMeasuring electric variables4%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner2%
H03FAmplifiers2%
Y10TTechnical subjects covered by former us classification2%
PatentTitleYear
10,693,471Digital phase locked loop for low jitter applications202010,686,452Digital phase locked loop for low jitter applications202010,615,806Digital phase locked loop for low jitter applications202010,566,981Digital phase locked loop for low jitter applications202010,164,647Digital phase locked loop for low jitter applications201810,103,739Digital phase locked loop for low jitter applications201810,084,460Digital phase locked loop for low jitter applications201810,063,243Digital phase locked loop for low jitter applications20189,917,591'Digital phase locked loop for low jitter applications'20189,906,228'Digital phase locked loop for low jitter applications'20189,819,350'Digital phase locked loop for low jitter applications'20179,806,723'Digital phase locked loop for low jitter applications'20179,455,728'Digital phase locked loop for low jitter applications'20169,252,717'Phase noise reduction in LC-VCO'20168,791,728'High frequency CMOS programmable divider with large divide ratio'20148,791,726'Controlled resonant power transfer'20148,581,648'High frequency quadrature PLL circuit and method'20138,525,561'Phase lock loop having high frequency CMOS programmable divider with large divide ratio'20138,519,892'Integrated millimeter wave antenna and transceiver on a substrate'20138,471,595'Selectable dynamic/static latch with embedded logic'20138,415,999'High frequency quadrature PLL circuit and method'20138,399,927'Semiconductor structure including a high performance fet and a high voltage fet on an SOI substrate'20138,299,823'Preventing metastability of a divide-by-two quadrature divider'20128,232,920'Integrated millimeter wave antenna and transceiver on a substrate'20128,120,110'Semiconductor structure including a high performance FET and a high voltage FET on a SOI substrate'20128,012,814'Method of forming a high performance fet and a high voltage fet on a SOI substrate'20117,943,404'Integrated millimeter wave antenna and transceiver on a substrate'20117,818,074'Methods to select golden devices for device model extractions'20107,741,857'System and method for de-embedding a device under test employing a parametrized netlist'20107,627,835'Frequency divider monitor of phase lock loop'20097,362,184'Frequency divider monitor of phase lock loop'2008Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2008–2020Patents assigned to IBM (31)· patent assignee history
2008–2020Based in Essex Junction, VT, US· patent location history
2012–2014Patents assigned to JIN ZHENRONG (9)· patent assignee history
2012–2014Patents assigned to FENG KAI D (8)· patent assignee history
2012–2013Patents assigned to DING HANYI (5)· patent assignee history
2012–2013Patents assigned to HE ZHONG-XIANG (4)· patent assignee history
2017Based in Essex, VT, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 31 | 2008–2020 |
| JIN ZHENRONGself | 9 | 2012–2014 |
| FENG KAI D | 8 | 2012–2014 |
| DING HANYI | 5 | 2012–2013 |
| HE ZHONG-XIANG | 4 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Essex Junction, VT, US | 30 | 2008–2020 |
| Essex, VT, US | 1 | 2017 |