Inventor
Phillip Celaya
Inventor
Gilbert, AZ, US
Overview
Patents· 28 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1050%
H01LSemiconductor devices12%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
H05KPrinted circuits8%
Y02PClimate change mitigation technologies in the production or processing of goods8%
LOC134%
Y10TTechnical subjects covered by former us classification4%
B01DSeparation2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
11,049,843Semiconductor packages202110,727,170Semiconductor devices and methods of making the same202010,304,798Semiconductor packages with leadframes and related methods20199,899,349'Semiconductor packages and related methods'20189,620,443'Semiconductor component and method of manufacture'20179,379,048'Dual-flag stacked die package'20168,581,416'Method of forming a semiconductor device and leadframe therefor'20138,461,670'Semiconductor component and method of manufacture'20138,324,026'Method for manufacturing a semiconductor component'20128,253,239'Multi-chip semiconductor connector'20128,071,427'Method for manufacturing a semiconductor component and structure therefor'20117,875,964'Multi-chip semiconductor connector and method'20117,825,505'Semiconductor package and method therefor'20107,638,863'Semiconductor package and method therefor'20097,508,060'Multi-chip semiconductor connector assemblies'20097,498,195'Multi-chip semiconductor connector assembly method'20097,495,323'Semiconductor package structure having multiple heat dissipation paths and method of manufacture'20097,298,034'Multi-chip semiconductor connector assemblies'20077,202,105'Multi-chip semiconductor connector assembly method'20077,202,106'Multi-chip semiconductor connector and method'20077,180,170'Lead-free integrated circuit package structure'2007D0510728'Semiconductor device package'20056,889,429'Method of making a lead-free integrated circuit package'2005D0504874'Semiconductor device package'20056,093,972'Microelectronic package including a polymer encapsulated die'20005,895,229'Microelectronic package including a polymer encapsulated die, and method for forming same'19995,808,873'Electronic component assembly having an encapsulation material and method of forming the same'19985,085,839'Apparatus for the prevention of acid gas excursions'1992Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1992Based in Houston, TX, US· patent location history
1998–2000Patents assigned to MOTOROLA INC (3)· patent assignee history
1998Based in Phoenix, AZ, US· patent location history
1999–2000Based in Chandler, AZ, US· patent location history
2005–2016Patents assigned to SEMICONDUCTOR COMPONENTS IND (19)· patent assignee history
2005–2021Based in Gilbert, AZ, US· patent location history
2011–2013Patents assigned to CELAYA PHILLIP (5)· patent assignee history
2011–2012Patents assigned to LETTERMAN JR JAMES P (2)· patent assignee history
2017–2021Patents assigned to SEMICONDUCTOR COMPONENTS IND LLC (5)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SEMICONDUCTOR COMPONENTS IND | 19 | 2005–2016 |
| CELAYA PHILLIPself | 5 | 2011–2013 |
| SEMICONDUCTOR COMPONENTS IND LLC | 5 | 2017–2021 |
| MOTOROLA INC | 3 | 1998–2000 |
| LETTERMAN JR JAMES P | 2 | 2011–2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Gilbert, AZ, US | 24 | 2005–2021 |
| Chandler, AZ, US | 2 | 1999–2000 |
| Phoenix, AZ, US | 1 | 1998 |
| Houston, Texas, US | 1 | 1992 |