Inventor
Ming-Ching Chang
Inventor
Hsinchu, TW
Overview
Patents· 71 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices25%
H01LSemiconductor devices24%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
H01JElectric discharge tubes or discharge lamps3%
G06TImage data processing or generation, in general1%
G05DSystems for controlling or regulating non-electric variables1%
G06FElectric digital data processing1%
A61KPreparations for medical, dental or toiletry purposes0%
A61PSpecific therapeutic activity of chemical compounds or medicinal preparations0%
PatentTitleYear
10,872,978Metal gate structure and methods of fabricating thereof202010,867,807Semiconductor device and method202010,868,139Controlling profiles of replacement gates202010,867,998Semiconductor structure cutting process and structures formed thereby202010,854,728Vertical device having a protrusion structure202010,854,742Metal gate electrode of a semiconductor device202010,839,009Systems and methods for analyzing time series data based on event transitions202010,833,077Semiconductor structure cutting process and structures formed thereby202010,790,124Methods for removing particles from etching chamber202010,679,338Three-dimensional modeling of an object202010,665,457Method of forming an integrated circuit using a patterned mask layer202010,665,513Fin field-effect transistor device and method202010,658,491Controlling profiles of replacement gates202010,658,225FinFET devices and methods of forming the same202010,600,194Image and video capture architecture for three-dimensional reconstruction202010,535,654Cut metal gate with slanted sidewalls202010,515,955Methods of manufacturing transistor gate structures by local thinning of dummy gate stacks using an etch barrier201910,510,894Isolation structure having different distances to adjacent FinFET devices201910,505,014Vertical device having a protrusion source201910,468,527Metal gate structure and methods of fabricating thereof201910,460,994Residue-free metal gate cutting for fin-like field effect transistor201910,332,991Metal gate electrode of a semiconductor device201910,325,912Semiconductor structure cutting process and structures formed thereby201910,269,787Metal gate structure cutting process201910,269,581Method of fabricating a semiconductor structure201910,236,220Fin field-effect transistor device and method201910,134,604Semiconductor device and method201810,037,993Method of making a FinFET device20189,991,375Metal gate electrode of a semiconductor device20189,984,154Systems and methods for analyzing time series data based on event transitions20189,941,407Method of forming FinFET20189,934,971Method of forming an integrated circuit using a patterned mask layer20189,934,945Methods for removing particles from etching chamber20189,923,079'Composite dummy gate with conformal polysilicon layer for FinFET device'20189,779,963'Method of fabricating a semiconductor structure'20179,640,398'Method of forming an integrated circuit using a patterned mask layer'20179,614,054'Method of forming a vertical device'20179,613,819'Process chamber, method of preparing a process chamber, and method of operating a process chamber'20179,590,032'Fin-FET device and manufacturing method thereof'20179,570,319'Method of manufacturing a semiconductor device'20179,548,305'Semiconductor devices and methods of manufacture thereof'20179,508,830'Method of forming FinFET'20169,496,372'Method of making a FinFET device'20169,460,968'Fin shape for fin field-effect transistors and method of forming'20169,384,988'Gate protection caps and method of forming the same'20169,355,823'Methods for removing particles from etching chamber'20169,337,195'Semiconductor devices and methods of manufacture thereof'20169,306,037'Dummy gate electrode of semiconductor device'20169,287,179'Composite dummy gate with conformal polysilicon layer for FinFET device'20169,245,883'Method of making a FinFET device'20169,224,833'Method of forming a vertical device'20159,153,440'Method of forming a semiconductor device'20159,147,679'Method of semiconductor integrated circuit fabrication'20159,111,861'Method of fabricating a semiconductor structure with ion-implanted conductive layer'20159,041,125'Fin shape for fin field-effect transistors and method of forming'20158,923,567'Apparatus and method for predicting solar irradiance variation'20148,803,241'Dummy gate electrode of semiconductor device'20148,750,566'Apparatus and method for spatially relating views of sky images acquired at spaced apart locations'20148,691,655'Method of semiconductor integrated circuit fabrication'20148,507,979'Semiconductor integrated circuit with metal gate'20138,489,218'Chamber match using important variables filtered by dynamic multivariate analysis'20138,273,632'Patterning methodology for uniformity control'20128,053,323'Patterning methodology for uniformity control'20117,989,355'Method of pitch halving'20117,446,050'Etching and plasma treatment process to improve a gate profile'20087,109,085'Etching process to avoid polysilicon notching'20066,864,174'Iteratively selective gas flow control and dynamic database to achieve CD uniformity'20056,794,302'Dynamic feed forward temperature control to achieve CD etching uniformity'20046,794,313'Oxidation process to improve polysilicon sidewall roughness'20046,686,129'Partial photoresist etching'20046,447,814'Chinese herbal composition for improving blood circulation and the method of preparing the same'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002Based in Taichung, TW· patent location history
2004–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (24)· patent assignee history
2004–2008Based in Taipei, TW· patent location history
2011–2020Based in Hsinchu, TW· patent location history
2012–2016Patents assigned to CHANG MING-CHING (10)· patent assignee history
2012–2016Patents assigned to CHEN CHAO-CHENG (5)· patent assignee history
2014–2020Patents assigned to GEN ELECTRIC (4)· patent assignee history
2014Based in Niskayuna, NY, US· patent location history
2016–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (40)· patent assignee history
2018–2020Based in Clifton Park, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 40 | 2016–2020 |
| TAIWAN SEMICONDUCTOR MFG | 24 | 2004–2016 |
| CHANG MING-CHINGself | 10 | 2012–2016 |
| CHEN CHAO-CHENG | 5 | 2012–2016 |
| GEN ELECTRIC | 4 | 2014–2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 58 | 2011–2020 |
| Taipei, TW | 6 | 2004–2008 |
| Clifton Park, New York, US | 4 | 2018–2020 |
| Niskayuna, New York, US | 2 | 2014 |
| Taichung, TW | 1 | 2002 |