Inventor
Yu-Po Wang
Inventor
Taichung, TW
Overview
Patents· 26 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1065%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
H05KPrinted circuits11%
H01LSemiconductor devices8%
H10DInorganic electric semiconductor devices3%
PatentTitleYear
11,049,971Semiconductor device having epitaxial structure20219,356,008'Semiconductor package and fabrication method thereof'20169,269,677'Fabrication method of packaging substrate'20168,901,729'Semiconductor package, packaging substrate and fabrication method thereof'20148,304,665'Package substrate having landless conductive traces'20128,207,620'Flip-chip semiconductor package and chip carrier for preventing corner delamination'20128,183,092'Method of fabricating stacked semiconductor structure'20127,939,383'Method for fabricating semiconductor package free of substrate'20117,816,187'Method for fabricating semiconductor package free of substrate'20107,808,110'Semiconductor package substrate'20107,772,685'Stacked semiconductor structure and fabrication method thereof'20107,732,913'Semiconductor package substrate'20107,679,178'Semiconductor package on which a semiconductor device can be stacked and fabrication method thereof'20107,629,199'Method for fabricating semiconductor package with build-up layers formed on chip'20097,564,140'Semiconductor package and substrate structure thereof'20097,423,340'Semiconductor package free of substrate and fabrication method thereof'20087,361,846'High electrical performance semiconductor package'20087,354,796'Method for fabricating semiconductor package free of substrate'20087,342,318'Semiconductor package free of substrate and fabrication method thereof'20087,271,493'Semiconductor package free of substrate and fabrication method thereof'20077,205,642'Semiconductor package and method for fabricating the same'20077,205,674'Semiconductor package with build-up layers formed on chip and fabrication method of the semiconductor package'20076,884,652'Semiconductor package free of substrate and fabrication method thereof'20056,819,565'Cavity-down ball grid array semiconductor package with heat spreader'20046,750,533'Substrate with dam bar structure for smooth flow of encapsulating resin'20046,610,560'Chip-on-chip based multi-chip module with molded underfill and method of fabricating the same'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2016Patents assigned to SILICONWARE PRECISION INDUSTRIES CO LTD (25)· patent assignee history
2003–2011Based in Miaoli, TW· patent location history
2004–2016Based in Taichung, TW· patent location history
2012–2014Patents assigned to WANG YU-PO (4)· patent assignee history
2012Patents assigned to HSIAO CHENG-HSU (2)· patent assignee history
2012Patents assigned to LAI JENG-YUAN (2)· patent assignee history
2012Patents assigned to CHANG CHIANG-CHENG (1)· patent assignee history
2021Based in Tainan, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SILICONWARE PRECISION INDUSTRIES CO LTD | 25 | 2003–2016 |
| WANG YU-POself | 4 | 2012–2014 |
| HSIAO CHENG-HSU | 2 | 2012 |
| LAI JENG-YUAN | 2 | 2012 |
| CHANG CHIANG-CHENG | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Taichung, TW | 16 | 2004–2016 |
| Miaoli, TW | 9 | 2003–2011 |
| Tainan, TW | 1 | 2021 |