Inventor
Masataka Matsui
Inventor
Tokyo, JP
Overview
Patents· 39 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores40%
H03KPulse technique12%
H10BElectronic memory devices9%
G06FElectric digital data processing7%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests7%
B05BSpraying apparatus5%
B05DProcesses for applying fluent materials to surfaces, in general5%
H03MCoding3%
H10DInorganic electric semiconductor devices3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
PatentTitleYear
7,487,370'Semiconductor device and system'20096,011,713'Static random access memory including potential control means for writing data in memory cell and write method for memory cell'20005,965,922'Semiconductor memory device composed of half cells'19995,930,163'Semiconductor memory device having two P-well layout structure'19995,680,127'Parallel-to-serial conversion device and linear transformation device making use thereof'19975,646,873'Barrel shifter device and variable-length decoder'19975,565,244'Coating method in coating line and coating apparatus therefor'19965,512,772'Semiconductor device having bipolar transistor and MOS transistor'19965,426,390'Circuit for generating input transition detection pulse'19955,399,894'Semiconductor device having bipolar transistor and MOS transistor'19955,357,479'Static random access memory capable of preventing erroneous writing'19945,337,276'Read/write control device for random access memory'19945,331,225'BiCMOS logic circuit with bipolar transistor and MOS transistor formed on the same semiconductor substrate'19945,309,401'Static memory device'19945,294,812'Semiconductor device having identification region for carrying out failure analysis'19945,278,459'Static semiconductor memory using thin film FET'19945,276,647'Static random access memory including stress test circuitry'19945,268,599'TTL to CMOS input buffer using CMOS structure'19935,243,557'Bi-CMOS semiconductor integrated circuit'19935,239,501'Static memory cell'19935,169,683'Coating a rotating vehicle body'19925,091,889'Semiconductor memory having an operation margin against a write recovery time'19925,049,806'Band-gap type voltage generating circuit for an ECL circuit'19915,027,009'Semiconductor logic circuit with a bipolar current mirror arrangement'19915,010,521'CMOS static memory'19914,992,681'Logic level converting circuit'19914,987,560'Semiconductor memory device'19914,958,316'Static random access memory'19904,937,792'Static random access memory device with power down function'19904,931,994'Static semiconductor memory with section and block sense amplifiers'19904,931,998'Semiconductor memory device which can suppress operation error due to power supply noise'19904,922,461'Static random access memory with address transition detector'19904,916,668'Internal synchronization type MOS SRAM with address transition detecting circuit'19904,901,284'Static random access memory'19904,881,202'Semiconductor memory device using partial decoders for redundancy'19894,874,639'Coating method in coating line and coating apparatus therefor'19894,815,040'Static memory using a MIS field effect transistor'19894,813,022'Static memory with pull-up circuit for pulling-up a potential on a bit line'19894,740,718'Bi-CMOS logic circuit'1988Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1988–2009Patents assigned to TOSHIBA KK (36)· patent assignee history
1988–1996Based in Tokyo, JP· patent location history
1989–1996Patents assigned to MAZDA MOTOR (3)· patent assignee history
1989–1996Based in Hiroshima, JP· patent location history
1993–2009Based in Yokohama, JP· patent location history
1997Based in Menlo Park, CA, US· patent location history
1999–2000Based in San Jose, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TOSHIBA KK | 36 | 1988–2009 |
| MAZDA MOTOR | 3 | 1989–1996 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 25 | 1988–1996 |
| Yokohama, JP | 7 | 1993–2009 |
| Hiroshima, JP | 3 | 1989–1996 |
| San Jose, California, US | 2 | 1999–2000 |
| Menlo Park, California, US | 2 | 1997 |