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Inventor

Masato Kushibiki

Inventor
Nirasaki, JP

Overview

20→
Patents
2007–2017
Patent span
Electricity
Primary field (CPC H)

Patents· 20 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1038%
H01JElectric discharge tubes or discharge lamps17%
H01LSemiconductor devices12%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices6%
H10NElectric solid-state devices not otherwise provided for6%
C23FNon-mechanical removal of metallic material from surface4%
H05HPlasma technique4%
H10DInorganic electric semiconductor devices4%
C23CCoating metallic material2%
G11CStatic stores2%
PatentTitleYear
9,660,182'Plasma processing method and plasma processing apparatus'20179,419,211'Etching method and substrate processing apparatus'20169,208,997'Method of etching copper layer and mask'20159,165,784'Substrate processing method and storage medium'20158,962,489'Method for etching film containing cobalt and palladium'20158,815,495'Pattern forming method and manufacturing method of semiconductor device'20148,772,172'Semiconductor device manufacturing method and plasma etching apparatus'20148,642,136'Substrate processing method and substrate processing apparatus for performing a deposition process and calculating a termination time of the deposition process'20148,530,354'Substrate processing method'20138,491,804'Substrate processing method'20138,491,805'Semiconductor device manufacturing method and plasma etching apparatus'20138,383,521'Substrate processing method'20138,252,698'Substrate processing method'20128,241,511'Substrate processing method'20128,202,805'Substrate processing method'20127,897,498'Method for manufacturing semiconductor device'20117,811,939'Plasma etching method'20107,604,908'Fine pattern forming method'20097,256,135'Etching method and computer storage medium storing program for controlling same'20077,192,532'Dry etching method'2007

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2007–2017Patents assigned to TOKYO ELECTRON LTD (20)· patent assignee history
2007–2014Based in Nirasaki, JP· patent location history
2012–2015Patents assigned to KUSHIBIKI MASATO (10)· patent assignee history
2012–2015Patents assigned to NISHIMURA EIICHI (10)· patent assignee history
2013–2015Patents assigned to YAMASHITA FUMIKO (2)· patent assignee history
2014Patents assigned to SHIMIZU AKITAKA (1)· patent assignee history
2014Based in Yamanashi, JP· patent location history
2015–2017Based in Miyagi, JP· patent location history
2015Based in Kurokawa-gun, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TOKYO ELECTRON LTD202007–2017
KUSHIBIKI MASATOself102012–2015
NISHIMURA EIICHI102012–2015
YAMASHITA FUMIKO22013–2015
SHIMIZU AKITAKA12014
Locations
LocationPatentsSpan
Nirasaki, JP132007–2014
Miyagi, JP42015–2017
Yamanashi, JP22014
Kurokawa-gun, JP12015