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Inventor

Lee-Lean Shu

Inventor
Los Altos, CA, US

Overview

41→
Patents
1987–2021
Patent span
Physics
Primary field (CPC G)

Patents· 41 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores49%
G06FElectric digital data processing12%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses7%
H01LSemiconductor devices6%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use6%
H03KPulse technique3%
H05KPrinted circuits3%
G05FSystems for regulating electric or magnetic variables1%
H03FAmplifiers1%
PatentTitleYear
11,134,533SMS processing method in internet of things, mobility management network element, and terminal device202110,877,731Processing array device that performs one cycle full adder operation and bit line read/write logic features202010,860,318Computational memory cell and processing array device using memory cells202010,854,284Computational memory cell and processing array device with ratioless write port202010,817,292Computational memory cell and processing array device using memory cells202010,725,777Computational memory cell and processing array device using memory cells202010,720,205Systems and methods involving multi-bank, dual-pipe memory circuitry202010,535,381Systems and methods of pipelined output latching involving synchronous memory arrays202010,521,229Computational memory cell and processing array device using memory cells201910,303,629Systems and methods involving data bus inversion memory circuitry, configuration(s) and/or operation201910,249,362Computational memory cell and processing array device using the memory cells for XOR and XNOR computations201910,192,592Systems and methods involving data bus inversion memory circuitry, configuration and/or operation including data signals grouped into 10 bits and/or other features20199,966,118Systems and methods of pipelined output latching involving synchronous memory arrays20189,847,111Systems and methods of pipelined output latching involving synchronous memory arrays20179,613,670'Memory systems and methods involving high speed local address circuitry'20179,613,684'Systems and methods involving propagating read and write address and data through multi-bank memory circuitry'20179,412,440'Systems and methods of pipelined output latching involving synchronous memory arrays'20169,384,822'Systems and methods involving data bus inversion memory circuitry, configuration and/or operation including data signals grouped into 10 bits and/or other features'20169,385,032'Systems and methods involving data bus inversion memory circuitry, configuration and/or operation'20169,356,611'Systems and methods involving phase detection with adaptive locking/detection features'20169,318,174'Memory systems and methods involving high speed local address circuitry'20169,135,986'Systems and methods of sectioned bit line memory arrays, including hierarchical and/or other features'20159,053,768'Systems and methods of pipelined output latching involving synchronous memory arrays'20159,018,992'Systems and methods involving phase detection with adaptive locking/detection features'20158,885,439'Systems and methods including clock features such as minimization of simultaneous switching outputs (SSO) effects involving echo clocks'20148,638,144'Systems and methods involving phase detection with adaptive locking/detection features'20148,575,982'Systems and methods including features of power supply noise reduction and/or power-saving for high speed delay lines'20138,488,408'Systems and methods including clock features such as minimization of simultaneous switching outputs (SSO) effects involving echo clocks'20138,400,200'Systems and methods including features of power supply noise reduction and/or power-saving for high speed delay lines'20138,116,161'System and method for refreshing a DRAM device'20127,292,490'System and method for refreshing a DRAM device'20076,775,193'System and method for testing multiple embedded memories'20046,762,973'Data coherent logic for an SRAM device'20046,295,242'SRAM with current-mode test read data path'20015,519,712'Current mode test circuit for SRAM'19965,457,407'Binary weighted reference circuit for a variable impedance output buffer'19955,384,503'SRAM with current-mode read data path'19955,355,343'Static random access memory with self timed bit line equalization'19944,694,205'Midpoint sense amplification scheme for a CMOS DRAM'19874,670,861'CMOS N-well bias generator and gating system'19874,634,894'Low power CMOS reference generator with low impedance driver'1987

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1987Patents assigned to ADVANCED MICRO DEVICES INC (3)· patent assignee history
1987Based in Milpitas, CA, US· patent location history
1994–2001Based in Cupertino, CA, US· patent location history
1995–2001Patents assigned to SONY ELECTRONICS INC (3)· patent assignee history
1995–2020Based in Los Altos, CA, US· patent location history
2004Patents assigned to GIGA SEMICONDUCTOR INC (2)· patent assignee history
2007–2020Patents assigned to GSI TECHNOLOGY INC (29)· patent assignee history
2012–2014Patents assigned to SHU LEE-LEAN (4)· patent assignee history
2019–2020Based in Sunnyvale, CA, US· patent location history
2021Based in Shanghai, CN· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
GSI TECHNOLOGY INC292007–2020
SHU LEE-LEANself42012–2014
ADVANCED MICRO DEVICES INC31987
SONY ELECTRONICS INC31995–2001
GIGA SEMICONDUCTOR INC22004
Locations
LocationPatentsSpan
Los Altos, California, US261995–2020
Sunnyvale, California, US72019–2020
Cupertino, California, US31994–2001
Milpitas, California, US31987
Shanghai, CN12021