Inventor
Yoshihiro Miyazaki
Inventor
Hitachi, JP
Overview
Patents· 26 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing65%
B25JManipulators6%
H01HElectric switches6%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%
G09GArrangements or circuits for control of indicating devices using static means to present variable information3%
G11CStatic stores3%
H01LSemiconductor devices3%
H05KPrinted circuits3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
PatentTitleYear
10,661,450Finger mechanism, robot hand and robot hand controlling method202010,398,036Semiconductor device201910,286,561Finger mechanism, robot hand and robot hand controlling method20196,453,391'Multiplexed computer system'20026,138,248'Common disk unit multi-computer system'20006,032,265'Fault-tolerant computer system'20006,003,116'Multiplexed computer system with the capability to copy data from one processor memory to another'19995,852,728'Uninterruptible clock supply apparatus for fault tolerant computer system'19985,841,963'Dual information processing system having a plurality of data transfer channels'19985,737,513'Method of and system for verifying operation concurrence in maintenance/replacement of twin CPUs'19985,551,007'Method for controlling multiple common memories and multiple common memory system'19965,418,404'Data processing device and plug-in package'19955,345,566'Method and apparatus for controlling dual bus system'19945,343,009'Data processing device and plug-in package'19945,276,836'Data processing device with common memory connecting mechanism'19945,146,569'System for storing restart address of microprogram, determining the validity, and using valid restart address to resume execution upon removal of suspension'19925,029,073'Method for fast establishing a co-processor to memory linkage by main processor'19915,003,458'Suspended instruction restart processing system based on a checkpoint microprogram address'19914,896,258'Data processor provided with instructions which refer to both tagged and tagless data'19904,841,439'Method for restarting execution interrupted due to page fault in a data processing system'19894,807,113'Microprogrammed control data processing apparatus in which operand source and/or operand destination is determined independent of microprogram control'19894,799,056'Display system having extended raster operation circuitry'19894,783,731'Multicomputer system having dual common memories'19884,764,869'Method and apparatus for controlling interruption in the course of instruction execution in a processor'19884,603,406'Power backed-up dual memory system'19864,365,309'Digital differential analyzing processor'1982Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1982–2002Patents assigned to HITACHI LTD (22)· patent assignee history
1982–2002Based in Hitachi, JP· patent location history
1989Based in Shiga, JP· patent location history
1994–1995Patents assigned to HITACHI PROCESS COMPUTER ENG (2)· patent assignee history
1994Patents assigned to ARIX COMPUTER (1)· patent assignee history
2019–2020Patents assigned to SQUSE INC (2)· patent assignee history
2019Patents assigned to FUJI ELECTRIC CO LTD (1)· patent assignee history
2019–2020Based in Kyoto, JP· patent location history
2019Based in Shiojiri, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HITACHI LTD | 22 | 1982–2002 |
| HITACHI PROCESS COMPUTER ENG | 2 | 1994–1995 |
| SQUSE INC | 2 | 2019–2020 |
| ARIX COMPUTER | 1 | 1994 |
| FUJI ELECTRIC CO LTD | 1 | 2019 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hitachi, JP | 22 | 1982–2002 |
| Kyoto, JP | 2 | 2019–2020 |
| Shiojiri, JP | 1 | 2019 |
| Shiga, JP | 1 | 1989 |