Inventor
YU-RUEI CHEN
Inventor
TW
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices29%
H10DInorganic electric semiconductor devices24%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
G11CStatic stores5%
H10BElectronic memory devices5%
H10NElectric solid-state devices not otherwise provided for5%
A45DHairdressing or shaving equipment2%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices2%
G08BSignalling systems, e.g. personal calling systems2%
PatentTitleYear
12,518,993Reticle pod with backside static dissipation202612,484,680Nail clipper device202512,328,898High voltage semiconductor device including buried oxide layer202512,268,098Magnetoresistive random access memory having a ring of magnetic tunneling junction region surrounding an array region202512,262,555Semiconductor device and method of fabricating the same202512,243,839Bonded semiconductor structure utilizing concave/convex profile design for bonding pads202512,087,666Semiconductor device202412,040,396High voltage semiconductor device including buried oxide layer202411,935,854Method for forming bonded semiconductor structure utilizing concave/convex profile design for bonding pads202411,877,520Magnetoresistive random access memory having a ring of magnetic tunneling junction region surrounding an array region202411,869,953High voltage transistor device and method for fabricating the same202411,721,702Fabrication method of fin transistor202311,640,949Bonded semiconductor structure utilizing concave/convex profile design for bonding pads202311,626,515High voltage semiconductor device including buried oxide layer and method for forming the same202311,611,035Magnetoresistive random access memory having a ring of magnetic tunneling junction region surrounding an array region202311,552,001Semiconductor device202311,476,343High voltage transistor device and method for fabricating the same202211,417,685Fin transistor structure and fabrication method thereof2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2025Patents assigned to UNITED MICROELECTRONICS CORP (16)· patent assignee history
2022–2026Based in TW· patent location history
2025Patents assigned to UNIV CHANG GUNG SCIENCE & TECHNOLOGY (1)· patent assignee history
2026Patents assigned to GUDENG PREC IND CO LTD (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| UNITED MICROELECTRONICS CORP | 16 | 2022–2025 |
| GUDENG PREC IND CO LTD | 1 | 2026 |
| UNIV CHANG GUNG SCIENCE & TECHNOLOGY | 1 | 2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 18 | 2022–2026 |