Inventor

Lalan Jee Mishra

Inventor

San Diego, CA, US

Overview

63→

Patents

2015–2021

Patent span

Physics

Primary field (CPC G)

Patents· 63 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing52%

H04LTransmission of digital information, e.g. telegraphic communication14%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use11%

H03MCoding4%

H04BTransmission3%

H04WWireless communication networks3%

G05BControl or regulating systems in general2%

Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications2%

B25JManipulators1%

B64CAeroplanes1%

PatentTitleYear

11,023,408I3C single data rate write flow control2021 10,997,114Vector decoding in time-constrained double data rate interface2021 10,983,552Low latency trigger activation mechanism using bus protocol enhancement2021 10,963,035Low power PCIe2021 10,924,541Low-power and low-latency device enumeration with cartesian addressing2021 10,872,055Triple-data-rate technique for a synchronous link2020 10,838,898Bit-interleaved bi-directional transmissions on a multi-drop bus for time-critical data exchange2020 10,733,121Latency optimized I3C virtual GPIO with configurable operating mode and device skip2020 10,693,674In-datagram critical-signaling using pulse-count-modulation for I3C bus2020 10,642,778Slave master-write/read datagram payload extension2020 10,635,630Flexible protocol and associated hardware for one-wire radio frequency front-end interface2020 10,627,881Back power protection (BPP) in a system on a chip (SOC) with critical signaling scheme2020 10,614,009Asynchronous interrupt with synchronous polling and inhibit options on an RFFE bus2020 10,592,441Bus communication enhancement based on identification capture during bus arbitration2020 10,579,549Staggered transmissions on a multi-drop half-duplex bus2020 10,572,438Dynamic optimal data sampling time on a multi-drop bus2020 10,572,410Function-specific communication on a multi-drop bus for coexistence management2020 10,545,886Clock line driving for single-cycle data over clock signaling and pre-emption request in a multi-drop bus2020 10,528,503Real-time dynamic addressing scheme for device priority management2020 10,521,392Slave master-write/read datagram payload extension2019 10,515,044Communicating heterogeneous virtual general-purpose input/output messages over an I3C bus2019 10,511,397Virtual general purpose input/output (GPIO) (VGI) over a time division multiplex (TDM) bus2019 10,496,568Technique for RFFE and SPMI register-0 write datagram functional extension2019 10,482,055Hardware event priority sensitive programmable transmit wait-window for virtual GPIO finite state machine2019 10,474,622Method and apparatus for latency management of data communication over serial bus2019 10,467,154Multi-port multi-sideband-GPIO consolidation technique over a multi-drop serial bus2019 10,445,270Configuring optimal bus turnaround cycles for master-driven serial buses2019 10,447,464Super-speed UART with pre-frame bit-rate and independent variable upstream and downstream rates2019 10,423,551Ultra-short RFFE datagrams for latency sensitive radio frequency front-end2019 10,417,161Efficient technique for communicating between devices over a multi-drop bus2019 10,402,365Data lane validation procedure for multilane protocols2019 10,339,089Enhanced communications over a universal serial bus (USB) type-C cable2019 10,303,643Enhanced virtual GPIO with multi-mode modulation2019 10,289,582Enhanced serial peripheral interface2019 10,289,579Digital aggregation of interrupts from peripheral devices2019 10,241,953Dynamic data-link selection over common physical interface2019 10,146,727Enhanced virtual GPIO with multi-mode modulation2018 10,140,243Enhanced serial peripheral interface with hardware flow-control2018 10,140,242General purpose input/output (GPIO) signal bridging with I3C bus interfaces and virtualization in a multi-node network2018 10,057,209Time-sequenced multi-device address assignment2018 10,042,797Voltage mode and current mode device enumeration2018 10,019,406Radio frequency front end devices with masked write2018 10,005,555Imaging using multiple unmanned aerial vehicles2018 9,990,316Enhanced serial peripheral interface2018 9,990,317Full-mask partial-bit-field (FM-PBF) technique for latency sensitive masked-write2018 9,979,782Low-power and low-latency device enumeration with cartesian addressing2018 9,971,666Technique of link state detection and wakeup in power state oblivious interface2018 9,973,431Single line PMIC-host low-level control interface2018 9,965,410Priority-based data communication over multiple communication buses2018 9,933,834Clock-free dual-data-rate link with built-in flow control2018 9,934,171Serial communication link with optimal transfer latency2018 9,880,895'Serial interface with bit-level acknowledgement and error correction'2018 9,880,965'Variable frame length virtual GPIO with a modified UART interface'2018 9,875,209Synchronous data-link throughput enhancement technique based on data signal duty-cycle and phase modulation/demodulation2018 9,747,244'Clockless virtual GPIO'2017 9,684,487'Line-multiplexed UART'2017 9,619,427'Hybrid virtual GPIO'2017 9,582,456'Virtual GPIO'2017 9,563,398'Impedance-based flow control for a two-wire interface system with variable frame length'2017 9,537,687'Multi-modulation for data-link power reduction and throughput enhancement'2017 9,475,198'System and method for dynamic robot manipulator selection'2016 9,252,997'Data link power reduction technique using bipolar pulse amplitude modulation'2016 9,129,072'Virtual GPIO'2015

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2015–2021Patents assigned to QUALCOMM INC (63)· patent assignee history

2015–2021Based in San Diego, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
QUALCOMM INC	63	2015–2021

Locations

Location	Patents	Span
San Diego, California, US	63	2015–2021