Inventor
Young Lyong Kim
Inventor
Anyang-si, KR
Overview
Patents· 25 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1042%
H01LSemiconductor devices35%
H05KPrinted circuits8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form2%
G06FElectric digital data processing2%
G09GArrangements or circuits for control of indicating devices using static means to present variable information2%
G11CStatic stores2%
LOC092%
Y10TTechnical subjects covered by former us classification2%
PatentTitleYear
11,100,881Display panel202111,073,924Apparatus of display having detachable pattern202110,847,447Semiconductor device having planarized passivation layer and method of fabricating the same202010,804,218Semiconductor package202010,770,446Semiconductor packages and methods of manufacturing the same202010,658,300Semiconductor package and semiconductor device including the same202010,438,899Semiconductor packages201910,431,547Semiconductor package201910,177,131Semiconductor packages and methods of manufacturing the same20199,570,423'Semiconductor package and method of manufacturing the semiconductor package'20179,373,574'Semiconductor packages and methods of forming the same'20169,312,213'Bump structures having an extension'20169,299,631'Stack-type semiconductor package'20169,281,235'Semiconductor packages and methods of forming the same'20169,245,816'Semiconductor package and method of manufacturing the semiconductor package'20169,159,705'Semiconductor chip connecting semiconductor package'20159,024,448'Lower semiconductor molding die, semiconductor package, and method of manufacturing the semiconductor package'20158,970,046'Semiconductor packages and methods of forming the same'20158,884,446'Semiconductor packages'20148,815,731'Semiconductor package and method of fabricating the same'20148,354,744'Stacked semiconductor package having reduced height'20138,053,881'Semiconductor package and method for manufacturing the same'20117,759,795'Printed circuit board having reliable bump interconnection structure, method of fabricating the same, and semiconductor package using the same'20107,745,907'Semiconductor package including connector disposed in troughhole'2010D0582263'Package'2008Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2010–2020Patents assigned to SAMSUNG ELECTRONICS CO LTD (22)· patent assignee history
2010–2015Based in Gyeonggi-do, KR· patent location history
2011–2013Based in Seongnam-si, KR· patent location history
2013–2016Patents assigned to KIM YOUNG-LYONG (3)· patent assignee history
2014–2016Patents assigned to KIM YOUNG LYONG (4)· patent assignee history
2014–2020Based in Anyang-si, KR· patent location history
2014–2017Based in Gunpo-si, KR· patent location history
2015–2016Patents assigned to JANG CHUL-YONG (2)· patent assignee history
2016Patents assigned to JANG AE-NEE (3)· patent assignee history
2021Based in Daegu, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 22 | 2010–2020 |
| KIM YOUNG LYONGself | 4 | 2014–2016 |
| JANG AE-NEE | 3 | 2016 |
| KIM YOUNG-LYONGself | 3 | 2013–2016 |
| JANG CHUL-YONG | 2 | 2015–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Anyang-si, KR | 8 | 2014–2020 |
| Gunpo-si, KR | 8 | 2014–2017 |
| Gyeonggi-do, KR | 3 | 2010–2015 |
| Seongnam-si, KR | 2 | 2011–2013 |
| Daegu, KR | 1 | 2021 |