Inventor
Khanh B. Nguyen
Inventor
San Mateo, CA, US
Overview
Patents· 35 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1033%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices26%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1019%
B82YSpecific uses or applications of nanostructures7%
C23CCoating metallic material3%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
F25BRefrigeration machines, plants or systems2%
G05DSystems for controlling or regulating non-electric variables2%
H10BElectronic memory devices2%
H10DInorganic electric semiconductor devices2%
PatentTitleYear
6,875,668'Notched gate structure fabrication'20056,740,566'Ultra-thin resist shallow trench process using high selectivity nitride etch'20046,544,885'Polished hard mask process for conductor layer patterning'20036,492,067'Removable pellicle for lithographic mask protection and handling'20026,440,640'Thin resist with transition metal hard mask for via etch application'20026,414,326'Technique to separate dose-induced vs. focus-induced CD or linewidth variation'20026,370,680'Device to determine line edge roughness effect on device performance'20026,326,319'Method for coating ultra-thin resist films'20016,316,277'Tuning substrate/resist contrast to maximize defect inspection sensitivity for ultra-thin resist in DUV lithography'20016,309,926'Thin resist with nitride hard mask for gate etch application'20016,306,560'Ultra-thin resist and SiON/oxide hard mask for metal etch'20016,271,602'Method for reducing the susceptibility to chemical-mechanical polishing damage of an alignment mark formed in a semiconductor substrate'20016,255,125'Method and apparatus for compensating for critical dimension variations in the production of a semiconductor wafer'20016,207,966'Mark protection with transparent film'20016,208,747'Determination of scanning error in scanner by reticle rotation'20016,200,907'Ultra-thin resist and barrier metal/oxide hard mask for metal etch'20016,184,128'Method using a thin resist mask for dual damascene stop layer etch'20016,178,221'Lithography reflective mask'20016,178,256'Removal of reticle effect on critical dimension by reticle rotation'20016,171,763'Ultra-thin resist and oxide/nitride hard mask for metal etch'20016,165,695'Thin resist with amorphous silicon hard mask for via etch application'20006,162,587'Thin resist with transition metal hard mask for via etch application'20006,159,643'Extreme ultraviolet lithography reflective mask'20006,156,658'Ultra-thin resist and silicon/oxide hard mask for metal etch'20006,140,255'Method for depositing silicon nitride using low temperatures'20006,140,023'Method for transferring patterns created by lithography'20006,127,070'Thin resist with nitride hard mask for via etch application'20006,098,408'System for controlling reflection reticle temperature in microlithography'20006,096,661'Method for depositing silicon dioxide using low temperatures'20006,057,206'Mark protection scheme with no masking'20006,048,652'Backside polish EUV mask and method of manufacture'20006,020,269'Ultra-thin resist and nitride/oxide hard mask for metal etch'20006,013,399'Reworkable EUV mask materials'20005,985,498'Method of characterizing linewidth errors in a scanning lithography system'19995,969,807'Method for measuring lens imaging uniformity'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2005Patents assigned to ADVANCED MICRO DEVICES INC (34)· patent assignee history
1999–2002Based in San Mateo, CA, US· patent location history
2000–2005Based in Sunnyvale, CA, US· patent location history
2002Patents assigned to EUV LLC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ADVANCED MICRO DEVICES INC | 34 | 1999–2005 |
| EUV LLC | 1 | 2002 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Mateo, California, US | 26 | 1999–2002 |
| Sunnyvale, California, US | 9 | 2000–2005 |