Inventor
ANH LY
Inventor
US
Overview
Patents· 34 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores37%
G06NComputing arrangements based on specific computational models27%
G06FElectric digital data processing14%
H03FAmplifiers4%
H10BElectronic memory devices4%
H10DInorganic electric semiconductor devices4%
H03MCoding3%
H01LSemiconductor devices2%
G06GAnalogue computers1%
H10NElectric solid-state devices not otherwise provided for1%
PatentTitleYear
12,530,561Artificial neural network comprising an analog array and a digital array202612,518,829Adaptive bias decoder for non-volatile memory system202612,499,945Adaptive bias decoder for non-volatile memory system202512,475,950Adaptive bias decoder for non-volatile memory system202512,380,932Row decoder and row address scheme in a memory system202512,367,386Split array architecture for analog neural memory in a deep learning artificial neural network202512,248,870Neural network device202512,243,587Multiple row programming operation in artificial neural network array202512,237,011Read and programming decoding system for analog neural memory202512,205,655Testing of analog neural memory cells in an artificial neural network202512,099,921Decoders for analog neural memory in deep learning artificial neural network202412,062,397Transceiver for providing high voltages for erase or program operations in a non-volatile memory system202411,935,594Word line and control gate line tandem decoder for analog neural memory in deep learning artificial neural network202411,915,747Precision tuning of a page or word of non-volatile memory cells in an analog neural memory system202411,908,513Neural memory array storing synapsis weights in differential cell pairs202411,875,852Adaptive bias decoder to provide a voltage to a control gate line in an analog neural memory array in artificial neural network202411,798,619Precision tuning of a page or word of non-volatile memory cells in an analog neural memory system202311,783,904Compensation for leakage in an array of analog neural memory cells in an artificial neural network202311,727,989Programming analog neural memory cells in deep learning artificial neural network202311,646,078Set-while-verify circuit and reset-while verify circuit for resistive random access memory cells202311,600,321Analog neural memory array storing synapsis weights in differential cell pairs in artificial neural network202311,586,898Precision programming circuit for analog neural memory in deep learning artificial neural network202311,568,229Redundant memory access for rows or columns containing faulty memory cells in analog neural memory in deep learning artificial neural network202311,532,354Precision tuning of a page or word of non-volatile memory cells and associated high voltage circuits for an analog neural memory array in an artificial neural network202211,521,683Programming analog neural memory cells in deep learning artificial neural network202211,449,741Testing circuitry and methods for analog neural memory in artificial neural network202211,423,979Decoding system and physical layout for analog neural memory in deep learning artificial neural network202211,393,546Testing circuitry and methods for analog neural memory in artificial neural network202211,373,707Method and apparatus for configuring array columns and rows for accessing flash memory cells202211,354,562Programmable neuron for analog non-volatile memory in deep learning artificial neural network202211,355,184Analog neural memory array in artificial neural network with substantially constant array source impedance with adaptive weight mapping and distributed power202211,289,164Word line and control gate line tandem decoder for analog neural memory in deep learning artificial neural network202211,257,553Flash memory cell and associated high voltage row decoder202211,144,824Algorithms and circuitry for verifying a value stored during a programming operation of a non-volatile memory cell in an analog neural memory in deep learning artificial neural network2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to SILICON STORAGE TECH INC (34)· patent assignee history
2021–2026Based in US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SILICON STORAGE TECH INC | 34 | 2021–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 34 | 2021–2026 |