Inventor

Emmerich Bertagnolli

Inventor
Munich, DE

Overview

40→
Patents
1989–2015
Patent span
Electricity
Primary field (CPC H)

Patents· 40 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices23%
H10BElectronic memory devices20%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests12%
H01JElectric discharge tubes or discharge lamps8%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
G01NInvestigating or analysing materials by determining their chemical or physical properties7%
B82YSpecific uses or applications of nanostructures5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
C23CCoating metallic material3%
G01QScanning-probe techniques or apparatus3%
PatentTitleYear
9,006,681'Method of depositing protective structures'20158,939,108'Processing system'20158,507,854'Particle beam microscopy system and method for operating the same'20138,143,594'Method of depositing protective structures'20128,008,639'System for processing an object'20117,923,702'System and method for processing an object'20117,084,442'Double gate transistor arrangement for receiving electrical signals from living cells'20067,074,340'Method for producing a device for simultaneously carrying out an electrochemical and a topographical near-field microscopy'20066,894,272'Device for simultaneously carrying out an electrochemical and a topographical near-field microscopy'20056,642,565'Miniaturized capacitor with solid-state dielectric, in particular for integrated semiconductor memories, E.G. DRAMS, and method for fabricating such a capacitor'20036,586,795'DRAM cell configuration whose memory cells can have transistors and capacitors with improved electrical properties'20036,583,464'Memory cell using amorphous material to stabilize the boundary face between polycrystalline semiconductor material of a capacitor and monocrystalline semiconductor material of a transistor'20036,566,202'Integrated circuit having at least two vertical MOS transistors and method for manufacturing same'20036,403,440'Method for fabricating a stacked capacitor in a semiconductor configuration, and stacked capacitor fabricated by this method'20026,379,978'Memory cell configuration in which an electrical resistance of a memory element represents an information item and can be influenced by a magnetic field, and method for fabricating it'20026,376,313'Integrated circuit having at least two vertical MOS transistors and method for manufacturing same'20026,352,894'Method of forming DRAM cell arrangement'20026,309,930'SRAM cell arrangement and method for manufacturing same'20016,222,753'SRAM cell arrangement and method for manufacturing same'20016,211,019'Read-only memory cell device and method for its production'20016,172,391'DRAM cell arrangement and method for the manufacture thereof'20016,118,159'Electrically programmable memory cell configuration'20006,097,049'DRAM cell arrangement'20006,087,692'DRAM cell configuration and method for its fabrication'20006,075,265'DRAM cell arrangement and method for its fabrication'20006,044,009'DRAM cell arrangement and method for its production'20005,930,596'Semiconductor component for vertical integration and manufacturing method'19995,801,428'MOS transistor for biotechnical applications'19985,767,001'Process for producing semiconductor components between which contact is made vertically'19985,741,733'Method for the production of a three-dimensional circuit arrangement'19985,698,112'Corrosion protection for micromechanical metal layers'19975,472,916'Method for manufacturing tunnel-effect sensors'19955,460,982'Method for manufacturing lateral bipolar transistors'19955,407,843'Method for manufacturing lateral bipolar transistors'19955,395,775'Method for manufacturing lateral bipolar transistors'19955,358,882'Method for manufacturing a bipolar transistor in a substrate'19945,217,909'Method for manufacturing a bipolar transistor'19935,213,670'Method for manufacturing a polycrystalline layer on a substrate'19935,047,823'Circuit structure having a lateral bipolar transistor and its method of manufacture'19914,889,823'Bipolar transistor structure for very high speed circuits and method for the manufacture thereof'1989

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1989–2003Patents assigned to SIEMENS AG (25)· patent assignee history
1989–2003Based in Munich, DE· patent location history
2001–2003Patents assigned to INFINEON TECHNOLOGIES AG (6)· patent assignee history
2002–2015Based in Vienna, AT· patent location history
2002–2003Based in Mnchen, DE· patent location history
2012–2013Patents assigned to BERTAGNOLLI EMMERICH (2)· patent assignee history
2012–2013Patents assigned to BUEHLER WOLFRAM (2)· patent assignee history
2013–2015Patents assigned to ZEISS CARL MICROSCOPY GMBH (3)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SIEMENS AG251989–2003
INFINEON TECHNOLOGIES AG62001–2003
ZEISS CARL MICROSCOPY GMBH32013–2015
BERTAGNOLLI EMMERICHself22012–2013
BUEHLER WOLFRAM22012–2013
Locations
LocationPatentsSpan
Munich, DE261989–2003
Vienna, AT122002–2015
Mnchen, DE22002–2003