Inventor
Jeng-Jiun Yang
Inventor
Sunnyvale, CA, US
Overview
Patents· 16 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices45%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1034%
H10BElectronic memory devices7%
A23KFodder3%
A61KPreparations for medical, dental or toiletry purposes3%
C02FTreatment of water, waste water, sewage, or sludge3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
PatentTitleYear
8,735,980'Configuration and fabrication of semiconductor structure using empty and filled wells'20148,629,027'Structure and fabrication of asymmetric field-effect transistor having asymmetric channel zone and differently configured source/drain extensions'20148,415,752'Configuration and fabrication of semiconductor structure having asymmetric field-effect transistor with tailored pocket portion along source/drain zone'20138,410,549'Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket'20138,377,768'Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses'20138,304,835'Configuration and fabrication of semiconductor structure using empty and filled wells'20128,304,308'Configuration and fabrication of semiconductor structure having bipolar junction transistor in which non-monocrystalline semiconductor spacing portion controls base-link length'20128,163,619'Fabrication of semiconductor structure having asymmetric field-effect transistor with tailored pocket portion along source/drain zone'20128,101,479'Fabrication of asymmetric field-effect transistors using L-shaped spacers'20128,084,827'Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses'20118,030,151'Configuration and fabrication of semiconductor structure having bipolar junction transistor in which non-monocrystalline semiconductor spacing portion controls base-link length'20117,968,921'Asymmetric field-effect transistor having asymmetric channel zone and differently configured source/drain extensions'20117,632,804'Dietary products comprising one or more of γ-polyglutamic acid (γ-PGA, H form) and γ-polyglutamates for use as nutrition supplements'20097,479,229'Method for removing heavy metals from and dissolving calcium and/or magnesium scales in water or aqueous system'20095,825,068'Integrated circuits that include a barrier layer reducing hydrogen diffusion into a polysilicon resistor'19985,128,731'Static random access memory cell using a P/N-MOS transistors'1992Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1992–2014Based in Sunnyvale, CA, US· patent location history
2009Based in Taichung, TW· patent location history
2011–2014Patents assigned to NAT SEMICONDUCTOR CORP (11)· patent assignee history
2011–2014Patents assigned to BULUCEA CONSTANTIN (9)· patent assignee history
2011–2014Patents assigned to YANG JENG-JIUN (9)· patent assignee history
2011–2014Patents assigned to BAHL SANDEEP R (8)· patent assignee history
2011–2014Patents assigned to FRENCH WILLIAM D (6)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NAT SEMICONDUCTOR CORP | 11 | 2011–2014 |
| BULUCEA CONSTANTIN | 9 | 2011–2014 |
| YANG JENG-JIUNself | 9 | 2011–2014 |
| BAHL SANDEEP R | 8 | 2011–2014 |
| FRENCH WILLIAM D | 6 | 2011–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Sunnyvale, California, US | 14 | 1992–2014 |
| Taichung, TW | 2 | 2009 |