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Inventor

Ara Markosian

Inventor
Cupertino, CA, US

Overview

5→
Patents
1999–2010
Patent span
Physics
Primary field (CPC G)

Patents· 5 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing50%
H10DInorganic electric semiconductor devices25%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1013%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
PatentTitleYear
7,687,303'Method for determining via/contact pattern density effect in via/contact etch rate'20106,567,967'Method for designing large standard-cell base integrated circuits'20036,449,761'Method and apparatus for providing multiple electronic design solutions'20026,446,239'Method and apparatus for optimizing electronic design'20025,856,927'Method for automatically routing circuits of very large scale integration (VLSI)'1999

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999Patents assigned to VLSI TECHNOLOGY INC (1)· patent assignee history
1999Based in Sunnyvale, CA, US· patent location history
2002–2003Patents assigned to MONTEREY DESIGN SYSTEMS INC (3)· patent assignee history
2002–2010Based in Cupertino, CA, US· patent location history
2010Patents assigned to MENTOR GRAPHICS CORP (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MONTEREY DESIGN SYSTEMS INC32002–2003
MENTOR GRAPHICS CORP12010
VLSI TECHNOLOGY INC11999
Locations
LocationPatentsSpan
Cupertino, California, US42002–2010
Sunnyvale, California, US11999