Inventor
Hsin-Chih Tai
Inventor
San Jose, CA, US
Overview
Patents· 91 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Fprimary
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation53%
H01LSemiconductor devices16%
H04NPictorial communication, e.g. television10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
H10DInorganic electric semiconductor devices4%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
G02BOptical elements, systems or apparatus3%
B05DProcesses for applying fluent materials to surfaces, in general1%
B29DProducing particular articles from plastics or from substances in a plastic state1%
G05BControl or regulating systems in general1%
PatentTitleYear
9,698,185'Partial buried channel transfer device for image sensors'20179,419,035'Image sensor with color pixels having uniform light absorption depths'20169,372,286'Method of forming dual size microlenses for image sensors'20169,305,962'Dual-facing camera assembly'20169,305,968'Die seal ring for integrated circuit system with stacked device wafers'20169,291,755'Color filter including clear pixel and hard mask'20169,287,308'Image sensor having metal contact coupled through a contact etch stop layer with an isolation region'20169,236,411'Color filter patterning using hard mask'20169,230,856'Method for manufacturing structure having air gap'20169,224,881'Layers for increasing performance in image sensors'20159,165,959'Image sensor with pixel units having mirrored transistor layout'20159,165,969'Apparatus having thinner interconnect line for photodetector array and thicker interconnect line for periphery region'20159,142,581'Die seal ring for integrated circuit system with stacked device wafers'20159,083,899'Circuit structure for providing conversion gain of a pixel array'20159,054,007'Image sensor pixel cell with switched deep trench isolation structure'20159,041,072'Image sensor pixel cell with global shutter having narrow spacing between gates'20158,969,775'High dynamic range pixel having a plurality of amplifier transistors'20158,957,359'Compact in-pixel high dynamic range imaging'20158,952,309'Image sensor with micro-lens coating'20158,946,795'Backside-illuminated (BSI) image sensor with reduced blooming and electrical shutter'20158,947,572'Dual-sided image sensor'20158,941,159'Color filter including clear pixel and hard mask'20158,933,544'Integrated circuit stack with integrated electromagnetic interference shielding'20158,921,187'Process to eliminate lag in pixels having a plasma-doped pinning layer'20148,900,912'Dual-facing camera assembly'20148,859,352'Lightly-doped drains (LDD) of image sensor transistors using selective epitaxy'20148,835,211'Image sensor pixel cell with global shutter having narrow spacing between gates'20148,817,142'Image sensor with dual element color filter array and three channel color output'20148,809,923'Backside illuminated imaging sensor having a carrier substrate and a redistribution layer'20148,809,925'Partial buried channel transfer device in image sensors'20148,804,021'Method, apparatus and system for providing improved full well capacity in an image sensor pixel'20148,772,898'Lateral light shield in backside illuminated imaging sensors'20148,759,934'Backside illuminated image sensor with stressed film'20148,670,052'Image sensor with dual element color filter array and three channel color output'20148,658,956'Trench transfer gate for increased pixel fill factor'20148,643,132'In-pixel high dynamic range imaging'20148,614,112'Method of damage-free impurity doping for CMOS image sensors'20138,581,307'Large CMOS image sensor pixel with improved performance'20138,575,035'Methods of forming varying depth trenches in semiconductor devices'20138,569,856'Pad design for circuit under pad in semiconductor devices'20138,530,266'Image sensor having metal grid with a triangular cross-section'20138,513,762'Backside illuminated imaging sensor with vertical pixel sensor'20138,502,290'High full-well capacity pixel with graded photodetector implant'20138,497,536'Dual-facing camera assembly'20138,492,865'Image sensor with contact dummy pixels'20138,482,639'Black reference pixel for backside illuminated image sensor'20138,471,316'Isolation area between semiconductor devices having additional active area'20138,466,010'Seal ring support for backside illuminated image sensor'20138,431,429'Backside illuminated imaging sensor with reinforced pad structure'20138,426,796'Image sensor having supplemental capacitive coupling node'20138,405,748'CMOS image sensor with improved photodiode area allocation'20138,373,243'Seal ring support for backside illuminated image sensor'20138,357,984'Image sensor with low electrical cross-talk'20138,345,132'Image sensor with dual element color filter array and three channel color output'20138,338,900'Image sensor having curved micro-mirrors over the sensing photodiode and method for fabricating'20128,338,856'Backside illuminated image sensor with stressed film'20128,330,195'Multilayer image sensor pixel structure for reducing crosstalk'20128,329,497'Backside illuminated imaging sensor with improved infrared sensitivity'20128,318,529'Laser anneal for image sensors'20128,319,301'Self-aligned filter for an image sensor'20128,314,869'Image sensor with improved black level calibration'20128,294,077'Image sensor having supplemental capacitive coupling node'20128,293,629'High full-well capacity pixel with graded photodetector implant'20128,278,690'Laser anneal for image sensors'20128,274,101'CMOS image sensor with heat management structures'20128,253,200'Lightly-doped drains (LDD) of image sensor transistors using selective epitaxy'20128,247,852'Backside illuminated imaging sensor with reinforced pad structure'20128,233,066'Image sensor with improved black level calibration'20128,228,411'Circuit and photo sensor overlap for backside illumination image sensor'20128,187,909'Backside illuminated image sensor having deep light reflective trenches'20128,183,510'Image sensor with buried self aligned focusing element'20128,101,978'Circuit and photo sensor overlap for backside illumination image sensor'20128,097,890'Image sensor with micro-lenses of varying focal lengths'20128,071,429'Wafer dicing using scribe line etch'20118,063,465'Backside illuminated imaging sensor with vertical pixel sensor'20117,989,859'Backside illuminated imaging sensor with silicide light reflecting layer'20117,948,018'Multilayer image sensor structure for reducing crosstalk'20117,910,961'Image sensor with low crosstalk and high red sensitivity'20117,901,974'Masked laser anneal during fabrication of backside illuminated image sensors'20117,902,618'Backside illuminated imaging sensor with improved angular response'20117,888,159'Image sensor having curved micro-mirrors over the sensing photodiode and method for fabricating'20117,888,215'CMOS image sensor with high full-well-capacity'20117,888,763'Backside illuminated imaging sensor with improved infrared sensitivity'20117,875,918'Multilayer image sensor pixel structure for reducing crosstalk'20117,825,966'High dynamic range sensor with blooming drain'20107,820,498'Backside illuminated imaging sensor with light reflecting transfer gate'20107,800,192'Backside illuminated image sensor having deep light reflective trenches'20107,592,262'Method for manufacturing MOS transistors utilizing a hybrid hard mask'20097,589,306'Image sensor with buried self aligned focusing element'20097,491,615'Method of fabricating strained-silicon transistors and strained-silicon CMOS transistors'20097,031,860'Method and system of semiconductor fabrication fault analysis'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006Based in Kaohsiung, TW· patent location history
2009–2017Patents assigned to OMNIVISION TECH INC (86)· patent assignee history
2009–2015Based in Cupertino, CA, US· patent location history
2009Based in Taipei, TW· patent location history
2011–2017Patents assigned to TAI HSIN-CHIH (51)· patent assignee history
2011–2017Patents assigned to MAO DULI (44)· patent assignee history
2011–2017Patents assigned to RHODES HOWARD E (43)· patent assignee history
2011–2017Patents assigned to VENEZIA VINCENT (39)· patent assignee history
2011–2017Based in San Jose, CA, US· patent location history
2016Based in Hsinchu, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| OMNIVISION TECH INC | 86 | 2009–2017 |
| TAI HSIN-CHIHself | 51 | 2011–2017 |
| MAO DULI | 44 | 2011–2017 |
| RHODES HOWARD E | 43 | 2011–2017 |
| VENEZIA VINCENT | 39 | 2011–2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 64 | 2011–2017 |
| Cupertino, California, US | 23 | 2009–2015 |
| Taipei, TW | 2 | 2009 |
| Hsinchu, TW | 1 | 2016 |
| Kaohsiung, TW | 1 | 2006 |