Inventor
Yukio Nishida
Inventor
Tokyo, JP
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices33%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1016%
H01LSemiconductor devices14%
H10BElectronic memory devices12%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
D05BSewing6%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation4%
D05DIndexing scheme associated with subclasses d05b and d05c, relating to sewing, embroidering and tufting2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
10,840,257Semiconductor memory device20209,842,766'Semiconductor device and method for fabricating semiconductor device'20179,780,232'Memory semiconductor device with peripheral circuit multi-layer conductive film gate electrode and method of manufacture'20179,379,150'Solid-state image sensing device and method for manufacturing the same'20169,299,854'Patterning a conductive film in a manufacturing method of semiconductor device'20169,287,259'Semiconductor integrated circuit device and method for manufacturing semiconductor integrated circuit device'20169,245,921'Semiconductor device including image pick up device'20168,796,780'Semiconductor device and manufacturing method thereof'20146,872,628'Method of manufacturing semiconductor device'20056,864,128'Manufacturing method for a semiconductor device'20056,812,536'MOSFET with graded gate oxide layer'20046,740,939'Semiconductor device and manufacturing method thereof'20046,600,195'Semiconductor device'20036,576,965'Semiconductor device with lightly doped drain layer'20036,518,625'Semiconductor device'20036,506,651'Semiconductor device and manufacturing method thereof'20036,461,934'Method of manufacturing semiconductor device having trench type element isolation regions'20026,344,388'Method of manufacturing semiconductor device'20026,335,252'Semiconductor device manufacturing method'20026,223,664'Buttonhole sewing machine'20014,722,288'Sewing machine'19884,712,497'Sewing machine'1987Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1987–1988Patents assigned to BROTHER IND LTD (2)· patent assignee history
1988–2001Based in Kuwana, JP· patent location history
2002–2003Patents assigned to MITSUBISHI ELECTRIC CORP (7)· patent assignee history
2002–2017Based in Tokyo, JP· patent location history
2003Based in Hyogo, JP· patent location history
2004–2005Patents assigned to RENESAS TECH CORP (4)· patent assignee history
2014–2017Patents assigned to RENESAS ELECTRONICS CORP (6)· patent assignee history
2014–2016Patents assigned to NISHIDA YUKIO (2)· patent assignee history
2016Based in Kanagawa, JP· patent location history
2020Based in Fujisawa, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MITSUBISHI ELECTRIC CORP | 7 | 2002–2003 |
| RENESAS ELECTRONICS CORP | 6 | 2014–2017 |
| RENESAS TECH CORP | 4 | 2004–2005 |
| BROTHER IND LTD | 2 | 1987–1988 |
| NISHIDA YUKIOself | 2 | 2014–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 11 | 2002–2017 |
| Kanagawa, JP | 4 | 2016 |
| Hyogo, JP | 2 | 2003 |
| Kuwana, JP | 2 | 1988–2001 |
| Fujisawa, JP | 1 | 2020 |