Inventor
Kye-hyun Kyung
Inventor
Yongin-si, KR
Overview
Patents· 61 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores60%
G06FElectric digital data processing9%
A47CChairs6%
G01RMeasuring electric variables3%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications2%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use2%
F16KValves1%
PatentTitleYear
9,817,434'Memory system controlling peak current generation for a plurality of memories by synchronizing internal clock of each memory with a processor clock at different times to avoid peak current generation period overlapping'20179,261,940'Memory system controlling peak current generation for a plurality of memories by monitoring a peak signal to synchronize an internal clock of each memory by a processor clock at different times'2016RE045378'Method for receiving data'2015RE045366'Method of writing data to a memory'20158,729,615'Non-volatile memory device with high speed operation and lower power consumption'2014RE044618'Devices and methods for controlling active termination resistors in a memory system'20138,477,546'Semiconductor memory devices having redundancy arrays'2013RE044064'Semiconductor memory device and module for high frequency operation'20138,120,976'Line defect detection circuit for detecting weak line'20127,961,018'Semiconductor device including delay locked loop having periodically activated replica path'20117,894,260'Synchronous semiconductor memory device having on-die termination circuit and on-die termination method'20117,804,720'Integrated circuit memory devices including mode registers set using a data input/output bus'20107,787,283'Devices and methods for controlling active termination resistors in a memory system'20107,765,442'Memory device testable without using data and dataless test method'20107,679,975'Semiconductor memory devices having redundancy arrays'20107,636,273'Integrated circuit memory devices that support selective mode register set commands'20097,616,473'Devices and methods for controlling active termination resistors in a memory system'20097,539,826'System, device, and method for improved mirror mode operation of a semiconductor memory device'20097,477,067'Semiconductor integrated circuit which can be burn-in-tested even when packaged and method of burn-in-testing semiconductor integrated circuit even when the semiconductor integrated circuit is packaged'20097,457,189'Integrated circuit memory devices that support selective mode register set commands and related methods'20087,457,192'Semiconductor memory device and module for high frequency operation'20087,447,084'Semiconductor memory device and method of supplying wordline voltage thereof'20087,426,145'Synchronous semiconductor memory device having on-die termination circuit and on-die termination method'20087,369,445'Methods of operating memory systems including memory devices set to different operating modes and related systems'20087,313,715'Memory system having stub bus configuration'20077,289,379'Memory devices and methods of operation thereof using interdependent sense amplifier control'20077,285,975'Termination providing apparatus mounted on memory module or socket and memory system using the apparatus'20077,277,356'Methods of controlling memory modules that support selective mode register set commands'20077,239,560'Synchronous semiconductor memory device having on-die termination circuit and on-die termination method'20077,170,818'Semiconductor memory device and module for high frequency operation'20077,167,407'Dynamic semiconductor memory device and power saving mode of operation method of the same'20077,124,250'Memory module device for use in high-frequency operation'20067,102,958'Integrated circuit memory devices that support selective mode register set commands and related memory modules, memory controllers, and methods'20067,093,076'Memory system having two-way ring topology and memory device and memory module for ring-topology memory system'20067,045,892'Stack package of semiconductor device'20066,956,780'Semiconductor memory device having direct sense amplifier implemented in hierarchical input/output line architecture'20056,940,765'Repair apparatus and method for semiconductor memory device to be selectively programmed for wafer-level test or post package test'20056,877,079'Memory system having point-to-point bus configuration'20056,862,249'Devices and methods for controlling active termination resistors in a memory system'20056,834,014'Semiconductor memory systems, methods, and devices for controlling active termination'20046,813,198'Semiconductor memory device and method of repairing the same'20046,754,132'Devices and methods for controlling active termination resistors in a memory system'20046,667,916'Mode control circuit for semiconductor device and semiconductor memory device having the mode control circuit'20036,584,028'Memory system and semiconductor memory device for enhancing bus efficiency and refresh method of the semiconductor memory device'20036,570,803'Memory system capable of increasing utilization efficiency of semiconductor memory device and method of refreshing the semiconductor memory device'20036,549,444'Memory device with prefetched data ordering distributed in prefetched data path logic, circuit, and method of ordering prefetched data'20036,525,417'Integrated circuits having reduced step height by using dummy conductive lines'20036,489,832'Chip information output circuit'20026,486,651'Integrated circuit devices having a delay locked loop that is configurable for high-frequency operation during test and methods of operating same'20026,438,015'Semiconductor memory device and memory system for improving bus efficiency'2002RE037753'Semiconductor memory device and read and write methods thereof'20026,372,626'Method of reducing step heights in integrated circuits by using dummy conductive lines, and integrated circuits fabricated thereby'20026,304,500'Integrated circuit memory devices having data input and output lines extending in the column direction, and circuits and methods for repairing faulty cells'20016,151,263'Integrated circuit memory devices having data input and output lines extending along the column direction'20006,141,271'Circuits for testing memory devices having direct access test mode and methods for testing the same'20006,078,536'Packet type integrated circuit memory devices having pins assigned direct test mode and associated methods'20006,046,947'Integrated circuit memory devices having direct access mode test capability and methods of testing same'20005,986,953'Input/output circuits and methods for testing integrated circuit memory devices'19995,982,222'High voltage generating circuit for a semiconductor memory device'19995,783,935'Reference voltage generator and method utilizing clamping'19985,650,977'Integrated circuit memory device including banks of memory cells and related methods'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2017Patents assigned to SAMSUNG ELECTRONICS CO LTD (61)· patent assignee history
1999–2009Based in Kyungki-do, KR· patent location history
2002–2007Based in Suwon-si, KR· patent location history
2005–2017Based in Yongin-si, KR· patent location history
2005–2013Based in Yongin, KR· patent location history
2006–2015Based in Gyeonggi-do, KR· patent location history
2012–2016Patents assigned to KYUNG KYE-HYUN (6)· patent assignee history
2014Patents assigned to CHANG SUNG-IL (1)· patent assignee history
2016Patents assigned to CHOI SEUNG-HUN (1)· patent assignee history
2016Patents assigned to JEONG JAE-YONG (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 61 | 1997–2017 |
| KYUNG KYE-HYUNself | 6 | 2012–2016 |
| CHANG SUNG-IL | 1 | 2014 |
| CHOI SEUNG-HUN | 1 | 2016 |
| JEONG JAE-YONG | 1 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Yongin-si, KR | 15 | 2005–2017 |
| Gyeonggi-do, KR | 11 | 2006–2015 |
| Kyungki-do, KR | 11 | 1999–2009 |
| Suwon-si, KR | 9 | 2002–2007 |
| Yongin, KR | 8 | 2005–2013 |