Inventor

Clarence W. Teng

Inventor

Plano, TX, US

Overview

37→

Patents

1985–1999

Patent span

Electricity

Primary field (CPC H)

Patents· 37 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Bprimary

H10BElectronic memory devices27%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1023%

H10DInorganic electric semiconductor devices18%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests15%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%

Y02PClimate change mitigation technologies in the production or processing of goods3%

PatentTitleYear

5,894,145'Multiple substrate bias random access memory device'1999 5,671,175'Capacitor over bitline DRAM cell'1997 5,595,925'Method for fabricating a multiple well structure for providing multiple substrate bias for DRAM device formed therein'1997 5,587,614'Microplanarization of rough electrodes by thin amorphous layers'1996 5,364,812'High density dynamic RAM cell'1994 5,352,913'Dynamic memory storage capacitor having reduced gated diode leakage'1994 5,225,363'Trench capacitor DRAM cell and method of manufacture'1993 5,202,279'Poly sidewall process to reduce gated diode leakage'1993 5,198,383'Method of fabricating a composed pillar transistor DRAM Cell'1993 5,156,992'Process for forming poly-sheet pillar transistor DRAM cell'1992 5,111,259'Trench capacitor memory cell with curved capacitors'1992 5,105,245'Trench capacitor DRAM cell with diffused bit lines adjacent to a trench'1992 5,087,591'Contact etch process'1992 5,061,653'Trench isolation process'1991 5,057,887'High density dynamic RAM cell'1991 5,049,519'Latch-up resistant CMOS process'1991 5,043,778'Oxide-isolated source/drain transistor'1991 5,028,980'Trench capacitor with expanded area'1991 4,987,093'Through-field implant isolated devices and method'1991 4,983,226'Defect free trench isolation devices and method of fabrication'1991 4,978,634'Method of making trench DRAM cell with stacked capacitor and buried lateral contact'1990 4,963,502'Method of making oxide-isolated source/drain transistor'1990 4,958,206'Diffused bit line trench capacitor dram cell'1990 4,958,212'Trench memory cell'1990 4,947,227'Latch-up resistant CMOS structure'1990 4,916,524'Dram cell and method'1990 4,892,614'Integrated circuit isolation process'1990 4,890,147'Through-field implant isolated devices and method'1989 4,864,375'Dram cell and method'1989 4,842,675'Integrated circuit isolation process'1989 4,830,978'Dram cell and method'1989 4,660,278'Process of making IC isolation structure'1987 4,656,732'Integrated circuit fabrication process'1987 4,631,803'Method of fabricating defect free trench isolation devices'1986 4,580,330'Integrated circuit isolation'1986 4,561,172'Integrated circuit fabrication method utilizing selective etching and oxidation to form isolation regions'1985 4,538,343'Channel stop isolation technology utilizing two-step etching and selective oxidation with sidewall masking'1985

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1985–1999Patents assigned to TEXAS INSTRUMENTS INC (37)· patent assignee history

1985–1999Based in Plano, TX, US· patent location history

1991Based in Dallas, TX, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TEXAS INSTRUMENTS INC	37	1985–1999

Locations

Location	Patents	Span
Plano, Texas, US	36	1985–1999
Dallas, Texas, US	1	1991