Inventor

Chih-Sen Huang

Inventor
Tainan, TW

Overview

69→
Patents
2013–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 69 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices30%
H10DInorganic electric semiconductor devices30%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1023%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
H10BElectronic memory devices5%
G11CStatic stores0%
H10KOrganic electric solid-state devices0%
PatentTitleYear
10,600,882Semiconductor structure202010,553,576Method for filling patterns202010,199,374Semiconductor device and fabrication method thereof201910,141,263Method for fabricating semiconductor device201810,049,929Method of making semiconductor structure having contact plug201810,026,726Dummy gate technology to avoid shorting circuit20189,984,974Method for fabricating semiconductor device having a patterned metal layer embedded in an interlayer dielectric layer20189,985,020Semiconductor structure and manufacturing method thereof20189,985,123Method for fabricating a semiconductor device having gate structure with doped hard mask20189,941,215Semiconductor device and method for fabricating the same20189,929,134'Semiconductor device and method for filling patterns'20189,899,322'Method for fabricating semiconductor device having a patterned metal layer embedded in an interlayer dielectric layer'20189,875,941Method for fabricating semiconductor device20189,870,996'Semiconductor device and method of fabricating the same'20189,865,593'Semiconductor device and fabrication method thereof'20189,859,170'Method of forming semiconductor structure'20189,831,133Semiconductor devices having metal gate and method for manufacturing semiconductor devices having metal gate20179,780,199'Method for forming semiconductor device'20179,721,841'Electronic circuit of fin FET and methof for fabricating the electronic circuit'20179,698,047'Dummy gate technology to avoid shorting circuit'20179,698,255'Semiconductor device having gate structure with doped hard mask'20179,685,337'Method for fabricating semiconductor device'20179,673,100'Semiconductor device having contact plug in two dielectric layers and two etch stop layers'20179,660,042'Semiconductor device and manufacturing method thereof'20179,613,969'Semiconductor structure and method of forming the same'20179,607,892'Method for forming a two-layered hard mask on top of a gate structure'20179,564,371'Method for forming semiconductor device'20179,548,239'Method for fabricating contact plug in an interlayer dielectric layer'20179,543,211'Semiconductor structure and manufacturing method thereof'20179,530,778'Semiconductor devices having metal gate and method for manufacturing semiconductor devices having metal gate'20169,466,564'Semiconductor device and method for fabricating the same'20169,466,521'Semiconductor device having a patterned metal layer embedded in an interlayer dielectric layer'20169,455,227'Semiconductor device and method for fabricating the same'20169,449,964'Semiconductor process'20169,412,745'Semiconductor structure having a center dummy region'20169,401,358'Semiconductor device structure'20169,349,653'Manufacturing method of semiconductor structure for preventing surface of fin structure from damage and providing improved process window'20169,349,639'Method for manufacturing a contact structure used to electrically connect a semiconductor device'20169,331,171'Manufacturing method for forming semiconductor structure'20169,324,610'Method for fabricating semiconductor device'20169,312,356'Semiconductor device and manufacturing method thereof'20169,312,121'Method for cleaning contact hole and forming contact plug therein'20169,306,032'Method of forming self-aligned metal gate structure in a replacement gate process using tapered interlayer dielectric'20169,281,199'Method for fabricating semiconductor device with paterned hard mask'20169,281,367'Semiconductor structure having contact plug and method of making the same'20169,263,392'Semiconductor device and method for fabricating the same'20169,263,540'Metal gate structure'20169,240,403'Embedded resistor'20169,230,816'Method for fabricating semiconductor device'20169,209,273'Method of fabricating metal gate structure'20159,196,352'Static random access memory unit cell structure and static random access memory unit cell layout structure'20159,190,291'Fin-shaped structure forming process'20159,147,747'Semiconductor structure with hard mask disposed on the gate structure'20159,117,886'Method for fabricating a semiconductor device by forming and removing a dummy gate structure'20159,093,285'Semiconductor structure and process thereof'20159,064,931'Semiconductor structure having contact plug and metal gate transistor and method of making the same'20159,064,814'Semiconductor structure having metal gate and manufacturing method thereof'20159,054,172'Semiconductor structure having contact plug and method of making the same'20159,006,804'Semiconductor device and fabrication method thereof'20158,993,433'Manufacturing method for forming a self aligned contact'20158,962,490'Method for fabricating semiconductor device'20158,921,947'Multi-metal gate semiconductor device having triple diameter metal opening'20148,921,226'Method of forming semiconductor structure having contact plug'20148,883,638'Method for manufacturing damascene structure involving dummy via holes'20148,836,129'Plug structure'20148,802,521'Semiconductor fin-shaped structure and manufacturing process thereof'20148,785,283'Method for forming semiconductor structure having metal connection'20148,765,546'Method for fabricating fin-shaped field-effect transistor'20148,574,978'Method for forming semiconductor device'2013

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2013–2020Patents assigned to UNITED MICROELECTRONICS CORP (68)· patent assignee history
2013–2014Patents assigned to HUANG CHIH-SEN (2)· patent assignee history
2013Patents assigned to CHOU LING-CHUN (1)· patent assignee history
2013–2020Based in Tainan, TW· patent location history
2014Patents assigned to FU SSU-I (1)· patent assignee history
2014Patents assigned to HU CHAN-YUAN (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
UNITED MICROELECTRONICS CORP682013–2020
HUANG CHIH-SENself22013–2014
CHOU LING-CHUN12013
FU SSU-I12014
HU CHAN-YUAN12014
Locations
LocationPatentsSpan
Tainan, TW692013–2020