LexDanaLexDanabeta
Inventor

Yuichi Matsui

Inventor
Kokubunji, JP

Overview

39→
Patents
1989–2014
Patent span
Electricity
Primary field (CPC H)

Patents· 39 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Bprimary
H10BElectronic memory devices28%
H10DInorganic electric semiconductor devices22%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%
C23CCoating metallic material9%
H10NElectric solid-state devices not otherwise provided for7%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%
H01LSemiconductor devices3%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
B60NSeats specially adapted for vehicles1%
C09KMaterials for miscellaneous applications, not provided for elsewhere1%
PatentTitleYear
8,890,107'Semiconductor memory'20148,866,120'Semiconductor memory'20148,859,344'Semiconductor memory'20148,833,857'Vehicle seat'20148,618,523'Semiconductor device'20138,106,441'Semiconductor device having plural DRAM memory cells and a logic circuit and method for manufacturing the same'20128,044,489'Semiconductor device with fluorine-containing interlayer dielectric film to prevent chalcogenide material layer from exfoliating from the interlayer dielectric film and process for producing the same'20118,000,126'Semiconductor device with recording layer containing indium, germanium, antimony and tellurium'20117,804,118'Semiconductor device having plural DRAM memory cells and a logic circuit and method for manufacturing the same'20107,800,153'Capacitive electrode having semiconductor layers with an interface of separated grain boundaries'20107,728,376'Semiconductor memory device'20107,683,419'Semiconductor device having plural DRAM memory cells and a logic circuit and method for manufacturing the same'20107,667,218'Semiconductor integrated circuit device and method of manufacturing the same'20107,638,786'Semiconductor and semiconductor manufacturing arrangements having a chalcogenide layer formed of columnar crystal grains perpendicular to a main substrate surface'20097,511,327'Capacitive electrode having semiconductor layers with an interface of separated grain boundaries'20097,408,218'Semiconductor device having plural dram memory cells and a logic circuit'20087,364,965'Semiconductor device and method of fabrication'20087,265,407'Capacitive electrode having semiconductor layers with an interface of separated grain boundaries'20077,259,058'Fabricating method of semiconductor integrated circuits'20077,112,819'Semiconductor device and manufacturing method thereof'20066,992,022'Fabrication method for semiconductor integrated devices'20066,989,304'Method for manufacturing a ruthenium film for a semiconductor device'20066,955,959'Method of making a memory structure having a multilayered contact and a storage capacitor with a composite dielectric layer of crystalized niobium pentoxide and tantalum pentoxide films'20056,833,577'Semiconductor device'20046,743,739'Fabrication method for semiconductor integrated devices'20046,720,603'CAPACITOR STRUCTURE AND A SEMICONDUCTOR DEVICE WITH A FIRST METAL LAYER, A SECOND METAL SILICIDE LAYER FORMED OVER THE FIRST METAL LAYER AND A SECOND METAL LAYER FORMED OVER THE SECOND METAL SILICIDE LAYER'20046,664,157'Semiconductor integrated circuit device and the method of producing the same'20036,555,429'Method of manufacturing semiconductor devices utilizing underlayer-dependency of deposition of capacitor electrode film, and semiconductor device'20036,534,375'METHOD OF FORMING A CAPACITOR IN A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE USING A METAL SILICON NITRIDE LAYER TO PROTECT AN UNDERLYING METAL SILICIDE LAYER FROM OXIDATION DURING SUBSEQUENT PROCESSING STEPS'20036,521,494'Method of manufacturing semiconductor devices utilizing underlayer-dependency of deposition of capacitor electrode film, and semiconductor device'20036,503,791'Method of manufacturing semiconductor devices utilizing underlayer-dependency of deposition of capacitor electrode film, and semiconductor device'20036,483,143'Semiconductor device having a capacitor structure including a self-alignment deposition preventing film'20026,451,665'Method of manufacturing a semiconductor integrated circuit'20026,326,218'Semiconductor integrated circuit and its manufacturing method'20015,373,172'Semiconducting diamond light-emitting element'19945,107,315'MIS type diamond field-effect transistor with a diamond insulator undercoat'19925,086,014'Schottky diode manufacturing process employing the synthesis of a polycrystalline diamond thin film'19924,894,691'Compound semiconductor device with superlattice channel region'19904,823,171'Compound semiconductor device'1989

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1989–1990Based in Osaka, JP· patent location history
1992–1994Based in Kobe, JP· patent location history
2001–2010Patents assigned to HITACHI LTD (12)· patent assignee history
2001–2007Based in Kokubunji, JP· patent location history
2004–2010Patents assigned to RENESAS TECH CORP (12)· patent assignee history
2004–2012Based in Koganei, JP· patent location history
2009–2014Based in Kawasaki, JP· patent location history
2010–2014Patents assigned to RENESAS ELECTRONICS CORP (8)· patent assignee history
2012–2014Patents assigned to MATSUI YUICHI (6)· patent assignee history
2013–2014Patents assigned to MATSUZAKI NOZOMU (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
HITACHI LTD122001–2010
RENESAS TECH CORP122004–2010
RENESAS ELECTRONICS CORP82010–2014
MATSUI YUICHIself62012–2014
MATSUZAKI NOZOMU42013–2014
Locations
LocationPatentsSpan
Kokubunji, JP122001–2007
Koganei, JP112004–2012
Kawasaki, JP92009–2014
Kobe, JP31992–1994
Osaka, JP21989–1990