Inventor
Joseph Natonio
Inventor
Wappingers Falls, NY, US
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H04Lprimary
H04LTransmission of digital information, e.g. telegraphic communication22%
G06FElectric digital data processing14%
H03FAmplifiers14%
H03GControl of amplification14%
H03KPulse technique8%
H03HImpedance networks, e.g. resonant circuits5%
H03MCoding5%
H04BTransmission5%
G01RMeasuring electric variables3%
H01LSemiconductor devices3%
PatentTitleYear
10,998,720T-coil enhanced ESD protection with passive equalization202110,135,644Low power passive offset injection for 1-tap decision feedback equalizer201810,027,297Variable gain amplifier with coupled degeneration resistance and capacitance20189,755,599'Amplifier with boosted peaking'20179,680,418'Variable gain amplifier with improved power supply noise rejection'20179,647,618'System and method for controlling common mode voltage via replica circuit and feedback control'20178,686,884'Testing of digital to analog converters in serial interfaces'20148,219,041'Design structure for transmitter bandwidth optimization circuit'20128,219,040'Transmitter bandwidth optimization circuit'20128,144,726'Structure for out of band signaling enhancement for high speed serial driver'20127,974,304'Out of band signaling enhancement for high speed serial driver'20117,560,966'Method of testing connectivity using dual operational mode CML latch'20097,486,114'Signal detector with calibration circuit arrangement'20097,397,261'Monitoring system for detecting and characterizing classes of leakage in CMOS devices'20087,358,787'Dual operational mode CML latch'20087,352,815'Data transceiver and method for equalizing the data eye of a differential input data signal'20087,145,413'Programmable impedance matching circuit and method'20066,949,981'Dynamic threshold for VCO calibration'20056,680,681'High speed FIR transmitter'20046,606,732'Method for specifying, identifying, selecting or verifying differential signal pairs on IC packages'20036,584,606'Fast method of I/O circuit placement and electrical rule checking'20036,499,134'Method of assigning integrated circuit I/O signals in an integrated circuit package'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002–2014Patents assigned to IBM (16)· patent assignee history
2002–2008Based in Poughkeepsie, NY, US· patent location history
2005–2018Based in Wappingers Falls, NY, US· patent location history
2012–2014Patents assigned to NATONIO JOSEPH (4)· patent assignee history
2012Patents assigned to ROCKROHR JAMES D (3)· patent assignee history
2012Patents assigned to XU HUIHAO (3)· patent assignee history
2017–2021Patents assigned to QUALCOMM INC (6)· patent assignee history
2018–2021Based in Pleasant Valley, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 16 | 2002–2014 |
| QUALCOMM INC | 6 | 2017–2021 |
| NATONIO JOSEPHself | 4 | 2012–2014 |
| ROCKROHR JAMES D | 3 | 2012 |
| XU HUIHAO | 3 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Wappingers Falls, New York, US | 14 | 2005–2018 |
| Poughkeepsie, New York, US | 6 | 2002–2008 |
| Pleasant Valley, New York, US | 2 | 2018–2021 |