Inventor
Laxman Murugesh
Inventor
Fremont, CA, US
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1023%
C23CCoating metallic material22%
H01JElectric discharge tubes or discharge lamps15%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests7%
Y10TTechnical subjects covered by former us classification5%
C04BLime, magnesia4%
B23KSoldering or unsoldering3%
B24BMachines, devices, or processes for grinding or polishing3%
B29CShaping or joining of plastics3%
B29KIndexing scheme associated with subclasses b29b, b29c or b29d, relating to moulding materials or to materials for moulds, reinforcements, fillers or preformed parts, e.g. inserts3%
PatentTitleYear
11,007,618Printing chemical mechanical polishing pad having window or controlled porosity20219,993,907Printed chemical mechanical polishing pad having printed window20189,481,608'Surface annealing of components for substrate processing chambers'20168,617,672'Localized surface annealing of components for substrate processing chambers'20137,732,056'Corrosion-resistant aluminum component having multi-layer coating'20107,431,772'Gas distributor having directed gas flow and cleaning method'20087,135,426'Erosion resistant process chamber components'20066,878,214'Process endpoint detection in processing chambers'20056,579,811'Method and apparatus for modifying the profile of narrow, high-aspect-ratio gaps through wafer heating'20036,450,117'Directing a flow of gas in a substrate processing chamber'20026,375,744'Sequential in-situ heating and deposition of halogen-doped silicon oxide'20026,228,781'Sequential in-situ heating and deposition of halogen-doped silicon oxide'20016,217,658'Sequencing of the recipe steps for the optimal low-dielectric constant HDP-CVD Processing'20016,200,911'Method and apparatus for modifying the profile of narrow, high-aspect-ratio gaps using differential plasma power'20016,159,333'Substrate processing system configurable for deposition or cleaning'20006,136,685'High deposition rate recipe for low dielectric constant films'20005,997,685'Corrosion-resistant apparatus'19995,994,662'Unique baffle to deflect remote plasma clean gases'19995,937,323'Sequencing of the recipe steps for the optimal low-k HDP-CVD processing'19995,811,195'Corrosion-resistant aluminum article for semiconductor processing equipment'19985,811,356'Reduction in mobile ion and metal contamination by varying season time and bias RF power during chamber cleaning'19985,810,937'Using ceramic wafer to protect susceptor during cleaning of a processing chamber'19985,756,222'Corrosion-resistant aluminum article for semiconductor processing equipment'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2021Patents assigned to APPLIED MATERIALS INC (23)· patent assignee history
1998–2003Based in Fremont, CA, US· patent location history
1998Based in Los Altos, CA, US· patent location history
1998Based in Santa Clara, CA, US· patent location history
2005–2021Based in San Ramon, CA, US· patent location history
2013Patents assigned to BHATNAGAR ASHISH (1)· patent assignee history
2013Patents assigned to GOPALAKRISHNAN PADMA (1)· patent assignee history
2013Patents assigned to MURUGESH LAXMAN (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| APPLIED MATERIALS INC | 23 | 1998–2021 |
| BHATNAGAR ASHISH | 1 | 2013 |
| GOPALAKRISHNAN PADMA | 1 | 2013 |
| MURUGESH LAXMANself | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Fremont, California, US | 13 | 1998–2003 |
| San Ramon, California, US | 8 | 2005–2021 |
| Los Altos, California, US | 1 | 1998 |
| Santa Clara, California, US | 1 | 1998 |