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Inventor

Takeshi Nojima

Inventor
Nara, JP

Overview

3→
Patents
1998–2006
Patent span
Physics
Primary field (CPC G)

Patents· 3 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores75%
H10BElectronic memory devices25%
PatentTitleYear
7,088,626'Bias voltage applying circuit and semiconductor memory device'20066,930,922'Reading circuit, reference circuit, and semiconductor memory device'20055,852,570'Semiconductor memory using select transistors coupled to sub-bitlines from different blocks'1998

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1998–2006Patents assigned to SHARP KK (3)· patent assignee history
1998Based in Tenri, JP· patent location history
2005–2006Based in Nara, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SHARP KK31998–2006
Locations
LocationPatentsSpan
Nara, JP22005–2006
Tenri, JP11998