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Inventor

Kar Keng Chua

Inventor
Penang, MY

Overview

30→
Patents
2003–2015
Patent span
Physics
Primary field (CPC G)

Patents· 30 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H03Kprimary
H03KPulse technique46%
G06FElectric digital data processing29%
G11CStatic stores14%
G01RMeasuring electric variables9%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
PatentTitleYear
9,225,335'Clock signal networks for structured ASIC devices'20158,863,061'Application-specific integrated circuit equivalents of programmable logic and associated methods'20148,786,308'Method and apparatus for providing signal routing control'20148,694,944'Predicting routability of integrated circuits'20148,595,658'Clock signal networks for structured ASIC devices'20138,533,250'Multiplier with built-in accumulator'20138,504,963'Application-specific integrated circuit equivalents of programmable logic and associated methods'20138,352,899'Method to modify an integrated circuit (IC) design'20138,327,199'Integrated circuit with configurable test pins'20128,291,355'Application-specific integrated circuit equivalents of programmable logic and associated methods'20128,261,141'Real time feedback compensation of programmable logic memory'20128,189,362'Data encoding scheme to reduce sense current'20128,151,224'Method of designing integrated circuits including providing an option to select a mask layer set'20128,037,377'Techniques for performing built-in self-test of receiver channel having a serializer'20117,978,493'Data encoding scheme to reduce sense current'20117,882,408'Real time feedback compensation of programmable logic memory'20117,870,513'Application-specific integrated circuit equivalents of programmable logic and associated methods'20117,733,121'Methods and apparatus for programmably powering down structured application-specific integrated circuits'20107,683,689'Delay circuit with delay cells in different orientations'20107,586,327'Distributed memory circuitry on structured application-specific integrated circuit devices'20097,404,169'Clock signal networks for structured ASIC devices'20087,363,596'Methods for storing and naming static library cells for lookup by logic synthesis and the like'20087,304,497'Methods and apparatus for programmably powering down structured application-specific integrated circuits'20077,246,339'Methods for creating and expanding libraries of structured ASIC logic and other functions'20077,243,329'Application-specific integrated circuit equivalents of programmable logic and associated methods'20077,243,315'Methods for producing structured application-specific integrated circuits that are equivalent to field-programmable gate arrays'20077,164,289'Real time feedback compensation of programmable logic memory'20077,071,731'Programmable Logic with Pipelined Memory Operation'20067,046,566'Voltage-based timing control of memory bit lines'20066,599,764'Isolation testing scheme for multi-die packages'2003

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2003–2015Patents assigned to ALTERA CORP (30)· patent assignee history
2003–2015Based in Penang, MY· patent location history
2010–2014Based in Juru, MY· patent location history
2012–2014Patents assigned to CHUA KAR KENG (10)· patent assignee history
2012–2014Patents assigned to ANG BOON JIN (4)· patent assignee history
2012–2013Patents assigned to CHEUNG SAMMY (2)· patent assignee history
2012–2014Patents assigned to CHONG THOW PANG (2)· patent assignee history
2014Based in Bukit Mertajam, MY· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
ALTERA CORP302003–2015
CHUA KAR KENGself102012–2014
ANG BOON JIN42012–2014
CHEUNG SAMMY22012–2013
CHONG THOW PANG22012–2014
Locations
LocationPatentsSpan
Penang, MY232003–2015
Juru, MY62010–2014
Bukit Mertajam, MY12014