Inventor
Sridhar K. Valluru
Inventor
Austin, TX, US
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
9,632,895'Apparatus, system and method for a common unified debug architecture for integrated circuits and SoCs'20179,043,649'Method and apparatus for output of high-bandwidth debug data/traces in ICS and SoCs using embedded high speed debug'20156,934,814'Cache coherence directory eviction mechanisms in multiprocessor systems which maintain transaction ordering'20056,925,536'Cache coherence directory eviction mechanisms for unmodified copies of memory lines in multiprocessor systems'20056,920,532'Cache coherence directory eviction mechanisms for modified copies of memory lines in multiprocessor systems'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005Patents assigned to NEWISYS INC (3)· patent assignee history
2005–2017Based in Austin, TX, US· patent location history
2015–2017Patents assigned to INTEL CORP (2)· patent assignee history
2015–2017Patents assigned to MENON SANKARAN M (2)· patent assignee history
2015–2017Patents assigned to RACHAKONDA RAMANA (2)· patent assignee history
2017Patents assigned to DOLEV EYAL (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NEWISYS INC | 3 | 2005 |
| INTEL CORP | 2 | 2015–2017 |
| MENON SANKARAN M | 2 | 2015–2017 |
| RACHAKONDA RAMANA | 2 | 2015–2017 |
| DOLEV EYAL | 1 | 2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 5 | 2005–2017 |