Inventor
Hung-Ming Tsai
Inventor
Boise, ID, US
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices26%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1021%
H10DInorganic electric semiconductor devices13%
H01LSemiconductor devices11%
G06FElectric digital data processing6%
C23CCoating metallic material4%
H03KPulse technique4%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use4%
B81BMicrostructural devices or systems, e.g. micromechanical devices2%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems2%
PatentTitleYear
11,014,805Method of forming semiconductor package and semiconductor package20219,825,628'Electronic device and operation method thereof'20179,766,749'Touch device and sensing compensation method'20179,490,799'Electronic device and operation method thereof'20169,147,604'Memory process'20159,123,784'Memory process and memory structure made thereby'20159,117,759'Methods of forming bulb-shaped trenches in silicon'20159,099,472'Semiconductor constructions, methods of forming conductive structures and methods of forming DRAM cells'20159,054,216'Methods of forming a vertical transistor'20158,921,183'Method for fabricating trench isolation structure'20148,790,977'Methods of forming a vertical transistor, methods of forming memory cells, and methods of forming arrays of memory cells'20148,658,538'Method of fabricating memory device'20148,647,988'Memory device and method of fabricating the same'20148,609,488'Methods of forming a vertical transistor and at least a conductive line electrically coupled therewith'20138,592,985'Methods of forming conductive structures and methods of forming DRAM cells'20138,450,175'Methods of forming a vertical transistor and at least a conductive line electrically coupled therewith'20138,426,925'Memory device and method of fabricating the same'20138,415,728'Memory device and method of fabricating the same'20138,334,196'Methods of forming conductive contacts in the fabrication of integrated circuitry'20127,855,124'Method for forming a semiconductor device'20107,577,144'Dynamic network address translation system and method of transparent private network device'20096,694,737'Compensation system for an engine of a vehicle'2004Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004–2021Based in Taichung, TW· patent location history
2010–2015Patents assigned to NANYA TECHNOLOGY CORP (8)· patent assignee history
2010Based in Taoyuan, TW· patent location history
2012–2015Patents assigned to MICRON TECHNOLOGY INC (8)· patent assignee history
2012–2015Patents assigned to TSAI HUNG-MING (5)· patent assignee history
2012–2015Based in Boise, ID, US· patent location history
2013Patents assigned to TSAI HUNG MING (3)· patent assignee history
2013Patents assigned to CHANG MING CHENG (2)· patent assignee history
2013–2015Based in Kaohsiung, TW· patent location history
2016–2017Based in Hsinchu County, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 8 | 2012–2015 |
| NANYA TECHNOLOGY CORP | 8 | 2010–2015 |
| TSAI HUNG-MINGself | 5 | 2012–2015 |
| TSAI HUNG MINGself | 3 | 2013 |
| CHANG MING CHENG | 2 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Boise, ID, US | 8 | 2012–2015 |
| Kaohsiung, TW | 7 | 2013–2015 |
| Taichung, TW | 3 | 2004–2021 |
| Hsinchu County, TW | 2 | 2016–2017 |
| Taoyuan, TW | 1 | 2010 |