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Inventor

Toshiaki Kawasaki

Inventor
Osaka, JP

Overview

38→
Patents
1990–2013
Patent span
Physics
Primary field (CPC G)

Patents· 38 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores60%
H10BElectronic memory devices13%
H03KPulse technique5%
H10DInorganic electric semiconductor devices5%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
G06FElectric digital data processing3%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems3%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses3%
H04NPictorial communication, e.g. television3%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%
PatentTitleYear
8,384,466'Semiconductor device'20138,094,498'Nonvolatile semiconductor memory device'20127,884,642'System LSI'20117,791,973'Electric fuse circuit available as one time programmable memory'20107,764,108'Electrical fuse circuit'20107,755,941'Nonvolatile semiconductor memory device'20107,696,779'System LSI'20107,622,982'Electrical fuse device'20097,623,380'Nonvolatile semiconductor memory device'20097,602,231'Charge-pump circuit'20097,397,720'Semiconductor storage device including electrical fuse module'20087,254,079'Electrical fuse circuit'20077,203,117'Semiconductor integrated circuit'20077,200,025'Semiconductor memory device'20077,193,908'Semiconductor memory'20077,184,304'Nonvolatile semiconductor memory device and method for fabricating the same'20077,057,956'Semiconductor integrated circuit device and method for testing the same'20067,050,347'Semiconductor memory'20067,002,865'Nonvolatile semiconductor memory device'20066,995,436'Nonvolatile semiconductor memory device'20066,448,826'Semiconductor device incorporating circuit for generating control clock in accordance with external clock frequency'20026,411,563'Semiconductor integrated circuit device provided with a logic circuit and a memory circuit and being capable of efficient interface between the same'20026,333,876'Semiconductor memory device'20016,118,723'Semiconductor memory device'20005,881,012'Semiconductor integrated circuit'19995,758,009'Video recording control device'1998D0351716'Shoe sole'1994D0350639'Shoe sole'1994D0343726'Shoe sole'1994D0339457'Shoe sole'1993D0339462'Shoe sole'1993D0339458'Shoe sole'1993D0327978'Heel sole'1992D0326768'Front shoe sole'1992D0323578'Shoe sole'1992D0321777'Shoe sole'1991D0319335'Shoe sole'1991D0308593'Shoe sole'1990

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1990–1994Patents assigned to ASICS CORP (11)· patent assignee history
1990–1994Based in Kobe, JP· patent location history
1994–2013Patents assigned to KAWASAKI TOSHIAKI (3)· patent assignee history
1998Based in Shijonawate, JP· patent location history
1999–2013Based in Osaka, JP· patent location history
2000–2008Patents assigned to MATSUSHITA ELECTRIC INDUSTRIAL CO LTD (13)· patent assignee history
2006–2007Based in Takatsuki, JP· patent location history
2009–2013Patents assigned to PANASONIC CORP (10)· patent assignee history
2012–2013Patents assigned to AGATA YASUHIRO (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD132000–2008
ASICS CORP111990–1994
PANASONIC CORP102009–2013
KAWASAKI TOSHIAKIself31994–2013
AGATA YASUHIRO22012–2013
Locations
LocationPatentsSpan
Osaka, JP221999–2013
Kobe, JP121990–1994
Takatsuki, JP32006–2007
Shijonawate, JP11998