Inventor

Raashina Humayun

Inventor
Los Altos, CA, US

Overview

63→
Patents
2004–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 63 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1025%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1024%
C23CCoating metallic material19%
H01LSemiconductor devices15%
H10BElectronic memory devices7%
H10DInorganic electric semiconductor devices2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
B08BCleaning in general2%
H05HPlasma technique1%
C11DDetergent compositions1%
PatentTitleYear
11,075,115Tungsten feature fill202110,916,434Feature fill with multi-stage nucleation inhibition202110,777,453Low resistivity films containing molybdenum202010,731,250Depositing ruthenium layers in interconnect metallization202010,580,695Feature fill with nucleation inhibition202010,580,654Feature fill with multi-stage nucleation inhibition202010,546,751Forming low resistivity fluorine free tungsten film without nucleation202010,529,722Tungsten for wordline applications202010,510,590Low resistivity films containing molybdenum201910,438,847Manganese barrier and adhesion layers for cobalt201910,283,404Selective deposition of WCN barrier/adhesion layer for interconnect201910,256,142Tungsten feature fill with nucleation inhibition201910,242,879Methods and apparatus for forming smooth and conformal cobalt film by atomic layer deposition201910,229,826Systems and methods for forming low resistivity metal contacts and interconnects by reducing and removing metallic oxide201910,170,320Feature fill with multi-stage nucleation inhibition201910,103,058Tungsten feature fill20189,997,405Feature fill with nucleation inhibition20189,978,605Method of forming low resistivity fluorine free tungsten film without nucleation20189,953,984Tungsten for wordline applications20189,748,137'Method for void-free cobalt gap fill'20179,673,146'Low temperature tungsten film deposition for small critical dimension contacts and interconnects'20179,653,353'Tungsten feature fill'20179,613,818'Deposition of low fluorine tungsten by sequential CVD process'20179,595,470'Methods of preparing tungsten and tungsten nitride thin films using tungsten chloride precursor'20179,589,808'Method for depositing extremely low resistivity tungsten'20179,589,835'Method for forming tungsten film having low resistivity, low roughness and high reflectivity'20179,548,228'Void free tungsten fill in different sized features'20179,257,302'CVD flowable gap fill'20169,240,347'Tungsten feature fill'20169,236,297'Low tempature tungsten film deposition for small critical dimension contacts and interconnects'20169,159,571'Tungsten deposition process using germanium-containing reducing agent'20159,082,826'Methods and apparatuses for void-free tungsten fill in three-dimensional semiconductor features'20159,034,760'Methods of forming tensile tungsten films and compressive tungsten films'20159,034,768'Depositing tungsten into high aspect ratio features'20158,883,637'Systems and methods for controlling etch selectivity of various materials'20148,853,080'Method for depositing tungsten film with low roughness and low resistivity'20148,835,317'Depositing tungsten into high aspect ratio features'20148,809,161'Flowable film dielectric gap fill process'20148,623,733'Methods for depositing ultra thin low resistivity tungsten film for small critical dimension contacts and interconnects'20148,551,885'Method for reducing tungsten roughness and improving reflectivity'20138,501,620'Method for depositing tungsten film having low resistivity, low roughness and high reflectivity'20138,481,403'Flowable film dielectric gap fill process'20138,435,894'Depositing tungsten into high aspect ratio features'20138,409,987'Method for depositing thin tungsten film with low resistivity and robust micro-adhesion characteristics'20138,367,546'Methods for forming all tungsten contacts and lines'20138,153,520'Thinning tungsten layer after through silicon via filling'20128,129,270'Method for depositing tungsten film having low resistivity, low roughness and high reflectivity'20128,124,531'Depositing tungsten into high aspect ratio features'20128,119,527'Depositing tungsten into high aspect ratio features'20128,062,977'Ternary tungsten-containing resistive thin films'20118,058,170'Method for depositing thin tungsten film with low resistivity and robust micro-adhesion characteristics'20118,053,365'Methods for forming all tungsten contacts and lines'20117,972,976'VLSI fabrication processes for introducing pores into dielectric materials'20117,888,233'Flowable film dielectric gap fill process'20117,629,224'VLSI fabrication processes for introducing pores into dielectric materials'20097,524,735'Flowable film dielectric gap fill process'20097,176,144'Plasma detemplating and silanol capping of porous dielectric films'20077,166,531'VLSI fabrication processes for introducing pores into dielectric materials'20077,074,690'Selective gap-fill process'20066,905,556'Method and apparatus for using surfactants in supercritical fluid processing of wafers'20056,805,801'Method and apparatus to remove additives and contaminants from a supercritical processing solution'20046,800,142'Method for removing photoresist and post-etch residue using activated peroxide followed by supercritical fluid treatment'20046,715,498'Method and apparatus for radiation enhanced supercritical fluid processing'2004

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2004–2021Patents assigned to NOVELLUS SYSTEMS INC (40)· patent assignee history
2004–2017Based in Fremont, CA, US· patent location history
2004–2009Based in San Jose, CA, US· patent location history
2007–2011Based in Sunnyvale, CA, US· patent location history
2011–2016Patents assigned to HUMAYUN RAASHINA (17)· patent assignee history
2011–2015Patents assigned to CHANDRASHEKAR ANAND (10)· patent assignee history
2012–2016Patents assigned to DANEK MICHAL (9)· patent assignee history
2014–2021Based in Los Altos, CA, US· patent location history
2015–2021Patents assigned to LAM RES CORP (23)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
NOVELLUS SYSTEMS INC402004–2021
LAM RES CORP232015–2021
HUMAYUN RAASHINAself172011–2016
CHANDRASHEKAR ANAND102011–2015
DANEK MICHAL92012–2016
Locations
LocationPatentsSpan
Los Altos, California, US322014–2021
Fremont, California, US222004–2017
San Jose, California, US62004–2009
Sunnyvale, California, US32007–2011