Inventor

John D. Porter

Inventor

Meridian, ID, US

Overview

1991–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 154 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores34%

H01JElectric discharge tubes or discharge lamps12%

H03KPulse technique11%

H03HImpedance networks, e.g. resonant circuits4%

H04LTransmission of digital information, e.g. telegraphic communication4%

H04WWireless communication networks4%

G06FElectric digital data processing3%

H10BElectronic memory devices3%

Y10TTechnical subjects covered by former us classification3%

H10DInorganic electric semiconductor devices2%

PatentTitleYear

11,127,449Sensing a memory cell2021 11,056,157Wear leveling2021 10,848,153Leakage current reduction in electronic devices2020 10,699,755Apparatuses and methods for plate coupled sense amplifiers2020 10,636,459Wear leveling2020 10,446,218Apparatuses and methods for configurable command and data input circuits forsemiconductor memories2019 10,437,514Apparatuses and methods including memory commands for semiconductor memories2019 10,373,660Apparatuses and methods for duty cycle distortion correction of clocks2019 10,320,371Method and apparatus for reducing impact of transistor random mismatch in circuits2019 10,249,358Apparatuses and methods for configurable command and data input circuits for semiconductor memories2019 10,249,354Apparatuses and methods for duty cycle distortion correction of clocks2019 10,229,728Oscillator controlled random sampling method and circuit2019 10,153,030Apparatuses and methods for configurable command and data input circuits for semiconductor memories2018 10,097,169Method and apparatus for reducing impact of transistor random mismatch in circuits2018 9,911,484'Oscillator controlled random sampling method and circuit'2018 9,653,143'Apparatuses including memory section control circuits with global drivers'2017 9,578,684'Antenna arrangement'2017 9,524,759'Apparatuses and methods for capturing data using a divided clock'2016 9,490,631'Over-limit electrical condition protection circuits and methods'2016 9,368,184'Memory refresh methods, memory section control circuits, and apparatuses'2016 D0733107'Wireless network unit'2015 9,054,700'Apparatus and methods of driving signal for reducing the leakage current'2015 8,861,296'Memory refresh methods, memory section control circuits, and apparatuses'2014 8,760,939'Memory sensing using temperature compensated initial currents'2014 8,743,640'Methods and systems for operating memory elements'2014 8,724,268'Over-limit electrical condition protection circuits and methods'2014 8,681,566'Apparatus and methods of driving signal for reducing the leakage current'2014 8,665,635'Memory cell'2014 8,649,207'Sensing resistance variable memory'2014 8,587,984'Sensing resistance variable memory'2013 8,588,022'Memory refresh methods, memory section control circuits, and apparatuses'2013 8,559,218'Temperature compensation in memory devices and systems'2013 8,406,027'System and method for mitigating reverse bias leakage'2013 8,395,837'Releasing and post-releasing processes in fabrications for micromirror array devices'2013 8,363,500'Methods for operating memory elements'2013 8,351,246'Memory cell'2013 8,233,318'Phase change memory'2012 8,194,475'Capacitive divider sensing of memory cells'2012 8,089,800'Memory cell'2012 8,027,187'Memory sensing devices, methods, and systems'2011 8,009,487'System and method for mitigating reverse bias leakage'2011 8,009,679'Communication system and method'2011 7,961,538'Methods for determining resistance of phase change memory elements'2011 7,948,793'Temperature compensation in memory devices and systems'2011 7,864,609'Methods for determining resistance of phase change memory elements'2011 7,813,167'Memory cell'2010 7,787,531'Predistorting of contention signals'2010 7,787,282'Sensing resistance variable memory'2010 7,729,163'Phase change memory'2010 7,724,564'Capacitive divider sensing of memory cells'2010 7,692,975'System and method for mitigating reverse bias leakage'2010 7,602,811'Synchronization in a communication system'2009 7,529,274'Communication system with variable length data frames'2009 7,519,043'Control signaling and dynamic channel allocation in a wireless network'2009 7,519,129'Precoding of contention words in a fixed wireless access system'2009 7,490,407'Method of patterning wall and phosphor well matrix utilizing glass'2009 7,430,209'Method and apparatus for providing communications bandwidth to users having a committed data rate based on priority assignment'2008 7,405,463'Gate dielectric antifuse circuit to protect a high-voltage transistor'2008 7,335,535'Method and apparatus for lubricating microelectromechanical devices in packages'2008 7,317,719'Communications network'2008 7,310,013'Method, apparatus, and system for low voltage temperature sensing'2007 7,190,610'Latch-up prevention for memory cells'2007 7,180,386'Variable resistance circuit'2007 7,126,871'Circuits and methods to protect a gate dielectric antifuse'2006 7,101,738'Gate dielectric antifuse circuit to protect a high-voltage transistor'2006 7,084,695'Method and apparatus for low voltage temperature sensing'2006 7,046,038'Upward and downward pulse stretcher circuits and modules'2006 7,018,889'Latch-up prevention for memory cells'2006 7,002,289'Light-emitting device having light-emissive particles partially coated with intensity-enhancement material'2006 7,002,287'Protected substrate structure for a field emission display device'2006 6,982,572'Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges, circuits and systems including same'2006 6,979,893'Packaged microelectromechanical device with lubricant'2005 6,977,912'Control signalling and dynamic channel allocation in a wireless network'2005 6,972,589'Method for rapidly propagating a fast edge of an output signal through a skewed logic device'2005 6,958,661'Variable resistance circuit'2005 6,949,948'Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges'2005 6,936,909'Gate dielectric antifuse circuit to protect a high-voltage transistor'2005 6,937,066'Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges'2005 6,919,735'Skewed nor and nand rising logic devices for rapidly propagating a rising edge of an output signal'2005 6,917,222'Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges and systems including same'2005 6,891,398'Skewed falling logic device for rapidly propagating a falling edge of an output signal'2005 6,865,628'Output data path capable of multiple data rates'2005 6,853,129'Protected substrate structure for a field emission display device'2005 6,847,198'Frequency sensing voltage regulator'2005 6,834,431'Method of patterning wall and phosphor well matrix utilizing glass'2004 6,823,407'Output data path capable of multiple data rates'2004 6,812,636'Light-emitting device having light-emissive particles partially coated with light-reflective or/and getter material'2004 6,809,968'SRAM array with temperature-compensated threshold voltage'2004 6,767,784'Latch-up prevention for memory cells'2004 6,751,150'Circuits and method to protect a gate dielectric antifuse'2004 6,742,257'Method of forming powder metal phosphor matrix and gripper structures in wall support'2004 6,743,068'Desorption processing for flat panel display'2004 6,745,013'Method and system for controlling transmit power of network nodes'2004 6,741,027'Protected substrate structure for a field emission display device'2004 6,741,614'Method and system for compensating signal propagation delay'2004 6,724,218'Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges'2004 6,687,503'Method and system for wireless connection to a wide area network'2004 6,657,512'Method to find a value within a range using weighted subranges'2003 6,642,588'Latch-up prevention for memory cells'2003 6,628,139'Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges'2003 6,586,916'Frequency sensing NMOS voltage regulator'2003 6,562,551'Gripping multi-level black matrix'2003 6,556,095'Method to find a value within a range using weighted subranges'2003 6,545,561'Method to find a value within a range using weighted subranges'2003 6,545,560'Method to find a value within a range using weighted subranges'2003 6,529,421'SRAM array with temperature-compensated threshold voltage'2003 6,516,363'Output data path having selectable data rates'2003 6,500,885'Polycarbonate-containing liquid chemical formulation and methods for making and using polycarbonate film'2002 6,476,640'Method for buffering an input signal'2002 6,469,591'Method to find a value within a range using weighted subranges'2002 6,445,259'Method to find a value within a range using weighted subranges'2002 6,432,593'Gripping multi-level structure'2002 6,418,126'Wireless ATM networks'2002 6,384,714'Method to find a value within a range using weighted subranges'2002 6,380,670'Encapsulated flat panel display components'2002 6,376,297'Latch-up prevention for memory cells'2002 6,356,013'Wall assembly and method for attaching walls for flat panel display'2002 6,331,766'Frequency sensing NMOS voltage regulator'2001 6,323,590'Wall assembly and method for attaching walls for flat panel display'2001 6,317,381'Method and system for adaptively adjusting control signal timing in a memory device'2001 6,310,820'Relaxed write timing for a memory device'2001 6,301,188'Method and apparatus for registering free flow information'2001 6,292,407'Method and apparatus for circuit variable updates'2001 6,288,483'Light-emitting structure having specially configured dark region'2001 6,275,119'Method to find a value within a range using weighted subranges'2001 6,239,618'Buffer with fast edge propagation'2001 6,225,737'Wall assembly and method for attaching walls for flat panel display'2001 6,215,241'Flat panel display with encapsulated matrix structure'2001 6,180,698'Polycarbonate-containing liquid chemical formulation and method for making polycarbonate film'2001 6,176,753'Wall assembly and method for attaching walls for flat panel display'2001 6,175,221'Frequency sensing NMOS voltage regulator'2001 6,140,762'Wall assembly and method for attaching walls for flat panel displays'2000 6,128,244'Method and apparatus for accessing one of a plurality of memory units within an electronic memory device'2000 6,120,674'Electrochemical removal of material in electron-emitting device'2000 6,113,708'Cleaning of flat-panel display'2000 6,111,351'Wall assembly and method for attaching walls for flat panel display'2000 6,088,278'Latching sense amplifier structure with pre-amplifier'2000 6,046,539'Use of sacrificial masking layer and backside exposure in forming openings that typically receive light-emissive material'2000 6,040,713'Buffer with fast edge propagation'2000 6,033,583'Vapor etching of nuclear tracks in dielectric materials'2000 6,026,031'Relaxed write timing for a memory device'2000 6,007,695'Selective removal of material using self-initiated galvanic activity in electrolytic bath'1999 6,005,797'Latch-up prevention for memory cells'1999 6,004,180'Cleaning of electron-emissive elements'1999 5,863,233'Field emitter fabrication using open circuit electrochemical lift off'1999 5,811,987'Block clock and initialization circuit for a complex high density PLD'1998 5,717,342'Output buffer incorporating shared intermediate nodes'1998 5,687,178'Method and apparatus for testing a static RAM'1997 5,565,794'Voltage range tolerant CMOS output buffer with reduced input capacitance'1996 5,343,428'Memory having a latching BICMOS sense amplifier'1994 5,291,455'Memory having distributed reference and bias voltages'1994 5,268,866'Memory with column redundancy and localized column redundancy control signals'1993 5,256,917'ECL logic gate with voltage protection'1993 5,003,513'Latching input buffer for an ATD memory'1991

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1991–1997Patents assigned to MOTOROLA INC (6)· patent assignee history

1991–1998Based in Austin, TX, US· patent location history

1998–2021Based in Boise, ID, US· patent location history

1999–2021Patents assigned to MICRON TECHNOLOGY INC (97)· patent assignee history

1999–2006Patents assigned to CANDESCENT TECH CORP (24)· patent assignee history

1999–2019Based in Meridian, ID, US· patent location history

1999–2009Based in Berkeley, CA, US· patent location history

2002–2005Patents assigned to CANDESCENT INTELLECTUAL PROP (8)· patent assignee history

2002–2009Based in Cambridge, GB· patent location history

2012–2014Patents assigned to PORTER JOHN D (14)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
MICRON TECHNOLOGY INC	97	1999–2021
CANDESCENT TECH CORP	24	1999–2006
PORTER JOHN Dself	14	2012–2014
CANDESCENT INTELLECTUAL PROP	8	2002–2005
MOTOROLA INC	6	1991–1997

Locations

Location	Patents	Span
Meridian, ID, US	68	1999–2019
Berkeley, California, US	31	1999–2009
Boise, ID, US	30	1998–2021
Austin, Texas, US	8	1991–1998
Cambridge, GB	5	2002–2009