Inventor
BRENT KEETH
Inventor
US
Overview
Patents· 38 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores25%
G06FElectric digital data processing20%
H01LSemiconductor devices17%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use6%
A61BDiagnosis2%
A61FFilters implantable into blood vessels2%
A61MDevices for introducing media into, or onto, the body2%
H04LTransmission of digital information, e.g. telegraphic communication2%
H10DInorganic electric semiconductor devices2%
PatentTitleYear
12,550,794Stacked memory routing techniques202612,437,832Repair techniques for coupled memory dies202512,379,954Protected regions management of memory202512,300,349Memory module multiple port buffer techniques202512,277,056Memory device interface and method202512,253,943Memory device interface and method202512,243,610Memory with parallel main and test interfaces202512,170,127Buffer configurations for communications between memory dies and a host device202412,045,500Memory device interface and method202411,989,141Neuromorphic memory device and method202411,983,059Memory expansion card202411,928,025Memory device protection202411,893,245Multi-purpose signaling for a memory system202411,887,969Signal delivery in stacked device202411,869,622Memory with fine grain architectures202411,868,253Memory device interface and method202411,797,186Latency offset for frame-based communications202311,791,317Finer grain dynamic random access memory202311,769,534Flexible memory system with a controller and a stack of memory202311,755,515Translation system for finer grain memory architectures202311,734,049Protected regions management of memory202311,658,156Channel routing for memory devices202311,644,982Unauthorized access command logging for memory202311,635,910Memory device interface and method202311,621,257Wafer-scale memory techniques202311,614,875Reconfigurable memory architectures202311,594,462Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods202311,580,049Frame protocol of memory device202311,538,508Memory module multiple port buffer techniques202211,527,510Finer grain dynamic random access memory202211,450,354Flexible memory system with a controller and a stack of memory202211,409,601Memory device protection202211,392,299Multi-purpose signaling for a memory system202211,386,004Memory device interface and method202211,281,608Translation system for finer grain memory architectures202211,264,360Signal delivery in stacked device202211,233,034Stacked memory routing techniques202211,226,920Frame protocol of memory device2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2025Patents assigned to MICRON TECHNOLOGY INC (33)· patent assignee history
2022–2026Based in US· patent location history
2024–2026Patents assigned to LODESTAR LICENSING GROUP LLC (5)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 33 | 2022–2025 |
| LODESTAR LICENSING GROUP LLC | 5 | 2024–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 38 | 2022–2026 |