Inventor

James P. Held

Inventor

Portland, OR, US

Overview

33→

Patents

1998–2021

Patent span

Physics

Primary field (CPC G)

Patents· 33 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing82%

G06TImage data processing or generation, in general8%

H04LTransmission of digital information, e.g. telegraphic communication5%

A61BDiagnosis3%

G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes3%

PatentTitleYear

10,912,497Detection and evaluation of movements of a user2021 10,635,438Method and system to provide user-level multithreading2020 10,628,153Method and system to provide user-level multithreading2020 10,613,858Method and system to provide user-level multithreading2020 10,585,667Method and system to provide user-level multithreading2020 10,554,634Techniques for shared private data objects in a trusted execution environment2020 10,540,652Technology for secure partitioning and updating of a distributed digital ledger2020 10,452,403Mechanism for instruction set based thread execution on a plurality of instruction sequencers2019 9,990,206Mechanism for instruction set based thread execution of a plurality of instruction sequencers2018 9,952,859Method and system to provide user-level multithreading2018 9,747,118'Guest-specific microcode'2017 9,720,697'Mechanism for instruction set based thread execution on a plurality of instruction sequencers'2017 9,588,771'Instruction set architecture-based inter-sequencer communications with a heterogeneous resource'2017 9,459,874'Instruction set architecture-based inter-sequencer communications with a heterogeneous resource'2016 9,442,721'Method and system to provide user-level multithreading'2016 9,189,230'Method and system to provide concurrent user-level, non-privileged shared resource thread creation and execution'2015 9,069,605'Mechanism to schedule threads on OS-sequestered sequencers without operating system intervention'2015 9,015,455'Processsor integral technologies for BIOS flash attack protection and notification'2015 9,003,164'Providing hardware support for shared virtual memory between local and remote physical memory'2015 8,914,618'Instruction set architecture-based inter-sequencer communications with a heterogeneous resource'2014 8,719,547'Providing hardware support for shared virtual memory between local and remote physical memory'2014 8,719,819'Mechanism for instruction set based thread execution on a plurality of instruction sequencers'2014 8,607,235'Mechanism to schedule threads on OS-sequestered sequencers without operating system intervention'2013 8,521,969'Apparatus and method for directing micro architectural memory region accesses'2013 7,827,551'Real-time threading service for partitioned multiprocessor systems'2010 7,810,083'Mechanism to emulate user-level multithreading on an OS-sequestered sequencer'2010 7,743,233'Sequencer address management'2010 7,380,276'Processor extensions and software verification to support type-safe language environments running with untrusted code'2008 5,893,126'Method and apparatus for annotating a computer document incorporating sound'1999 5,889,988'Debugger for debugging tasks in an operating system virtual device driver'1999 5,831,615'Method and apparatus for redrawing transparent windows'1998 5,809,317'Creating and maintaining hypertext links among heterogeneous documents by the establishment of anchors and connections among anchors'1998 5,768,607'Method and apparatus for freehand annotation and drawings incorporating sound and for compressing and synchronizing sound'1998

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1998–2020Patents assigned to INTEL CORP (32)· patent assignee history

1998–2020Based in Portland, OR, US· patent location history

2013–2017Patents assigned to HELD JAMES P (6)· patent assignee history

2013–2017Patents assigned to WANG HONG (6)· patent assignee history

2013–2017Patents assigned to SETHI PRASHANT (4)· patent assignee history

2014–2017Patents assigned to BIGBEE BRYANT (3)· patent assignee history

2021Based in Zurich, CH· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	32	1998–2020
HELD JAMES Pself	6	2013–2017
WANG HONG	6	2013–2017
SETHI PRASHANT	4	2013–2017
BIGBEE BRYANT	3	2014–2017

Locations

Location	Patents	Span
Portland, OR, US	32	1998–2020
Zurich, CH	1	2021