Inventor
Michael T. Andreas
Inventor
Boise, ID, US
Overview
Patents· 44 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1029%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests15%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
B24BMachines, devices, or processes for grinding or polishing7%
B08BCleaning in general6%
C09KMaterials for miscellaneous applications, not provided for elsewhere6%
C11DDetergent compositions6%
H10DInorganic electric semiconductor devices6%
H10BElectronic memory devices4%
H01LSemiconductor devices3%
PatentTitleYear
10,916,418Using sacrificial polymer materials in semiconductor processing202110,593,559Etching process in capacitor process of DRAM using a liquid etchant composition202010,497,558Using sacrificial polymer materials in semiconductor processing20199,653,307'Surface modification compositions, methods of modifying silicon-based materials, and methods of forming high aspect ratio structures'20178,283,257'Systems and methods for oscillating exposure of a semiconductor workpiece to multiple chemistries'20128,025,809'Polishing methods'20117,964,109'Method of cleaning a surface of a cobalt-containing material, method of forming an opening to a cobalt-containing material, semiconductor processing method of forming an integrated circuit comprising a copper-containing conductive line, and a cobalt-containing film cleaning solution'20117,468,105'CMP cleaning composition with microbial inhibitor'20087,402,259'Chemical-mechanical polishing methods'20087,367,343'Method of cleaning a surface of a cobalt-containing material, method of forming an opening to a cobalt-containing material, semiconductor processing method of forming an integrated circuit comprising a copper-containing conductive line, and a cobalt-containing film cleaning solution'20087,235,494'CMP cleaning composition with microbial inhibitor'20077,151,026'Semiconductor processing methods'20067,066,790'Chemical-mechanical polishing methods'20067,033,978'Post-planarization clean-up'20067,023,099'Wafer cleaning method and resulting wafer'20067,014,537'Method of processing a semiconductor substrate'20066,972,227'Semiconductor processing methods, and methods of forming a dynamic random access memory (DRAM) storage capacitor'20056,936,534'Method for the post-etch cleaning of multi-level damascene structures having underlying copper metallization'20056,936,540'Method of polishing a semiconductor substrate, post-CMP cleaning process, and method of cleaning residue from registration alignment markings'20056,930,017'Wafer Cleaning method and resulting wafer'20056,908,569'Ruthenium silicide wet etch'20056,835,668'Copper post-etch cleaning process'20046,835,121'Chemical-mechanical polishing methods'20046,787,473'Post-planarization clean-up'20046,740,252'Ruthenium silicide wet etch'20046,635,562'Methods and solutions for cleaning polished aluminum-containing layers'20036,627,550'Post-planarization clean-up'20036,613,674'Semiconductor processing methods of forming integrated circuitry, and methods of forming dynamic random access memory circuitry'20036,589,882'Copper post-etch cleaning process'20036,498,110'Ruthenium silicide wet etch'20026,468,951'Cleaning composition containing tetraalkylammonium salt and use thereof in semiconductor fabrication'20026,399,492'Ruthenium silicide processing methods'20026,387,812'Ultrasonic processing of chemical mechanical polishing slurries'20026,375,548'Chemical-mechanical polishing methods'20026,358,325'Polysilicon-silicon dioxide cleaning process performed in an integrated cleaner with scrubber'20026,273,100'Surface cleaning apparatus and method'20016,269,511'Surface cleaning apparatus'20016,265,781'Methods and solutions for cleaning polished aluminum-containing layers, methods for making metallization structures, and the structures resulting from these methods'20016,124,207'Slurries for mechanical or chemical-mechanical planarization of microelectronic-device substrate assemblies, and methods and apparatuses for making and using such slurries'20006,077,785'Ultrasonic processing of chemical mechanical polishing slurries'20006,044,851'Cleaning composition containing tetraalkylammonium salt and use thereof in semiconductor fabrication'20005,963,814'Method of forming recessed container cells by wet etching conductive layer and dissimilar layer formed over conductive layer'19995,895,550'Ultrasonic processing of chemical mechanical polishing slurries'19995,855,811'Cleaning composition containing tetraalkylammonium salt and use thereof in semiconductor fabrication'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2021Patents assigned to MICRON TECHNOLOGY INC (43)· patent assignee history
1999–2021Based in Boise, ID, US· patent location history
2008–2011Based in Manassas, VA, US· patent location history
2012Patents assigned to ANDREAS MICHAEL (1)· patent assignee history
2020Patents assigned to NANYA TECHNOLOGY CORP (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 43 | 1999–2021 |
| ANDREAS MICHAELself | 1 | 2012 |
| NANYA TECHNOLOGY CORP | 1 | 2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Boise, ID, US | 41 | 1999–2021 |
| Manassas, Virginia, US | 3 | 2008–2011 |