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Inventor

Jijun Chen

Inventor
San Jose, CA, US

Overview

5→
Patents
2013–2017
Patent span
Physics
Primary field (CPC G)

Patents· 5 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
9,582,626'Using waveform propagation for accurate delay calculation'20179,384,310'View data sharing for efficient multi-mode multi-corner timing analysis'20169,003,342'Lumped aggressor model for signal integrity timing analysis'20158,924,905'Constructing equivalent waveform models for static timing analysis of integrated circuit designs'20148,601,420'Equivalent waveform model for static timing analysis of integrated circuit designs'2013

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2013–2017Patents assigned to CADENCE DESIGN SYSTEMS INC (5)· patent assignee history
2013Patents assigned to CHEN JIJUN (1)· patent assignee history
2013Patents assigned to KELLER IGOR (1)· patent assignee history
2013Patents assigned to PHILLIPS JOEL R (1)· patent assignee history
2013–2017Based in San Jose, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
CADENCE DESIGN SYSTEMS INC52013–2017
CHEN JIJUNself12013
KELLER IGOR12013
PHILLIPS JOEL R12013
Locations
LocationPatentsSpan
San Jose, California, US52013–2017