Inventor

Shahzad Khalid

Inventor
Union City, CA, US

Overview

27→
Patents
2002–2014
Patent span
Physics
Primary field (CPC G)

Patents· 27 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores82%
H03FAmplifiers9%
H03KPulse technique9%
PatentTitleYear
8,873,303'Non-volatile memory and method with shared processing for an aggregate of read/write circuits'20148,072,817'Tracking cells for a memory system'20117,817,476'Non-volatile memory and method with shared processing for an aggregate of read/write circuits'20107,760,555'Tracking cells for a memory system'20107,681,094'Data recovery in a memory system using tracking cells'20107,539,060'Non-volatile storage using current sensing with biasing of source and P-Well'20097,532,514'Non-volatile memory and method with bit line to bit line coupled compensation'20097,532,516'Non-volatile storage with current sensing of negative threshold voltages'20097,489,554'Method for current sensing with biasing of source and P-well in non-volatile storage'20097,471,575'Non-volatile memory and method with shared processing for an aggregate of read/write circuits'20087,471,139'Voltage buffer for capacitive loads'20087,447,079'Method for sensing negative threshold voltages in non-volatile storage using current sensing'20087,301,807'Writable tracking cells'20077,269,069'Non-volatile memory and method with bit line to bit line coupled compensation'20077,237,074'Tracking cells for a memory system'20077,215,574'Non-volatile memory and method with bit line compensation dependent on neighboring operating modes'20077,167,041'Voltage buffer for capacitive loads'20077,064,980'Non-volatile memory and method with bit line coupled compensation'20067,002,401'Voltage buffer for capacitive loads'20066,956,770'Non-volatile memory and method with bit line compensation dependent on neighboring operating modes'20056,873,549'Writable tracking cells'20056,807,106'Hybrid density memory card'20046,747,892'Sense amplifier for multilevel non-volatile integrated memory devices'20046,714,449'Sense amplifier suitable for analogue voltage levels'20046,678,192'Error management for writable tracking storage units'20046,538,922'Writable tracking cells'20036,486,715'System and method for achieving fast switching of analog voltages on large capacitive load'2002

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2002–2010Patents assigned to SANDISK CORP (25)· patent assignee history
2002–2014Based in Union City, CA, US· patent location history
2005–2007Based in West Los Angeles, CA, US· patent location history
2007Based in Los Angeles, CA, US· patent location history
2011–2014Patents assigned to KHALID SHAHZAD (2)· patent assignee history
2011–2014Patents assigned to SANDISK TECHNOLOGIES INC (2)· patent assignee history
2014Patents assigned to CERNEA RAUL-ADRIAN (1)· patent assignee history
2014Patents assigned to CHAN SIU LUNG (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SANDISK CORP252002–2010
KHALID SHAHZADself22011–2014
SANDISK TECHNOLOGIES INC22011–2014
CERNEA RAUL-ADRIAN12014
CHAN SIU LUNG12014
Locations
LocationPatentsSpan
Union City, California, US232002–2014
West Los Angeles, California, US32005–2007
Los Angeles, California, US12007