Inventor
Hiromi Kawashima
Inventor
Kawasaki, JP
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores54%
H03KPulse technique19%
G05FSystems for regulating electric or magnetic variables16%
G01RMeasuring electric variables5%
G06FElectric digital data processing5%
PatentTitleYear
6,611,464'Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics'20036,563,738'Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics'20036,288,945'Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics'20015,815,440'Semiconductor memory device with electrically controllable threshold voltage'19985,770,963'Flash memory with improved erasability and its circuitry'19985,666,314'Semiconductor memory device for selecting and deselecting blocks of word lines'19975,631,597'Negative voltage circuit for a flash memory'19975,608,670'Flash memory with improved erasability and its circuitry'19975,592,419'Flash memory with improved erasability and its circuitry'19975,576,637'XOR CMOS logic gate'19965,452,251'Semiconductor memory device for selecting and deselecting blocks of word lines'19955,428,580'Nonvolatile semiconductor memory having an address-transition-detection circuit'19955,249,156'Semiconductor memory device having non-volatile and volatile memory cells'19935,173,876'Electrically erasable and programmable non-volatile semiconductor memory device'19925,111,136'Semiconductor circuit'19924,937,830'Semiconductor memory device having function of checking and correcting error of read-out data'19904,817,055'Semiconductor memory circuit including bias voltage generator'19894,812,680'High voltage detecting circuit'19894,773,046'Semiconductor device having fuse circuit and detecting circuit for detecting states of fuses in the fuse circuit'19884,744,058'Semiconductor programmable memory device and method of writing a predetermined pattern to same'19884,644,182'Delay circuit having delay time period determined by discharging operation'19874,601,020'Semiconductor memory device'19864,584,494'Semiconductor timer'1986Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1986–2003Patents assigned to FUJITSU LTD (23)· patent assignee history
1986–1993Based in Yokohama, JP· patent location history
1987–2003Based in Kawasaki, JP· patent location history
1992Patents assigned to FUJITSU VLSI LTD (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FUJITSU LTD | 23 | 1986–2003 |
| FUJITSU VLSI LTD | 1 | 1992 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kawasaki, JP | 18 | 1987–2003 |
| Yokohama, JP | 5 | 1986–1993 |