Inventor
Ljubo Radic
Inventor
Gilbert, AZ, US
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices34%
H01LSemiconductor devices28%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1015%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1013%
G06FElectric digital data processing3%
G01SRadio direction-finding1%
H01PWaveguides1%
H01QAntennas, i.e. radio aerials1%
H05KPrinted circuits1%
PatentTitleYear
11,075,110Transistor trench with field plate structure202111,018,247Semiconductor device with a base link region and method therefor202110,833,174Transistor devices with extended drain regions located in trench sidewalls202010,749,028Transistor with gate/field plate structure202010,749,023Vertical transistor with extended drain region202010,607,880Die with buried doped isolation region202010,600,911Field-effect transistor and method therefor202010,600,879Transistor trench structure with field plate structures202010,522,677Field-effect transistor and method therefor201910,483,359Method of fabricating a power semiconductor device201910,431,678Termination design for trench superjunction power MOSFET201910,424,646Field-effect transistor and method therefor201910,418,483Laterally diffused metal oxide semiconducting devices with lightly-doped isolation layers201910,225,925Radio frequency coupling and transition structure201910,103,257Termination design for trench superjunction power MOSFET20189,735,241'Semiconductor device with a field plate double trench having a thick bottom dielectric'20179,437,717'Interface control in a bipolar junction transistor'20169,299,793'Semiconductor device with a field plate trench having a thick bottom dielectric'20169,202,882'Semiconductor device with a thick bottom field plate trench having a single dielectric and angled sidewalls'20158,735,978'Semiconductor devices having reduced gate-drain capacitance'20148,603,883'Interface control in a bipolar junction transistor'20138,502,287'Semiconductor devices with enclosed void cavities'20137,919,388'Methods for fabricating semiconductor devices having reduced gate-drain capacitance'20117,838,389'Enclosed void cavity for low dielectric constant insulator'2010Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2010–2019Patents assigned to FREESCALE SEMICONDUCTOR INC (5)· patent assignee history
2010–2019Based in Chandler, AZ, US· patent location history
2013–2014Patents assigned to RADIC LJUBO (3)· patent assignee history
2013–2019Based in Torrance, CA, US· patent location history
2015–2019Patents assigned to INFINEON TECHNOLOGIES AMERICAS CORP (4)· patent assignee history
2015–2016Patents assigned to INT RECTIFIER CORP (2)· patent assignee history
2018–2021Patents assigned to NXP USA INC (13)· patent assignee history
2018–2019Based in Austin, TX, US· patent location history
2019–2021Based in Gilbert, AZ, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NXP USA INC | 13 | 2018–2021 |
| FREESCALE SEMICONDUCTOR INC | 5 | 2010–2019 |
| INFINEON TECHNOLOGIES AMERICAS CORP | 4 | 2015–2019 |
| RADIC LJUBOself | 3 | 2013–2014 |
| INT RECTIFIER CORP | 2 | 2015–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Gilbert, AZ, US | 11 | 2019–2021 |
| Torrance, California, US | 6 | 2013–2019 |
| Chandler, AZ, US | 5 | 2010–2019 |
| Austin, Texas, US | 2 | 2018–2019 |