Inventor
Jack Chris Randolph
Inventor
Rochester, MN, US
Overview
Patents· 10 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing80%
H04JMultiplex communication10%
H04LTransmission of digital information, e.g. telegraphic communication10%
PatentTitleYear
8,793,433'Digital data processing apparatus having multi-level register file'20147,917,700'Method and cache control circuit for replacing cache lines using alternate PLRU algorithm and victim cache coherency state'20117,284,092'Digital data processing apparatus having multi-level register file'20077,187,863'Identifying substreams in parallel/serial data link'20077,079,528'Data communication method'20067,065,101'Modification of bus protocol packet for serial data synchronization'20066,052,708'Performance monitoring of thread switch events in a multithreaded processor'20005,970,439'Performance monitoring in a data processing system'19995,862,371'Method and system for instruction trace reconstruction utilizing performance monitor outputs and bus monitoring'19995,835,705'Method and system for performance per-thread monitoring in a multithreaded processor'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2014Patents assigned to IBM (10)· patent assignee history
1998–2014Based in Rochester, MN, US· patent location history
2014Patents assigned to NUNAMAKER NATHAN SAMUEL (1)· patent assignee history
2014Patents assigned to RANDOLPH JACK CHRIS (1)· patent assignee history
2014Patents assigned to TSUCHIYA KENICHI (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 10 | 1998–2014 |
| NUNAMAKER NATHAN SAMUEL | 1 | 2014 |
| RANDOLPH JACK CHRISself | 1 | 2014 |
| TSUCHIYA KENICHI | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Rochester, Minnesota, US | 10 | 1998–2014 |