Inventor
Bret R. Olszewski
Inventor
Austin, TX, US
Overview
Patents· 82 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing85%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use7%
G11CStatic stores2%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications2%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%
H04LTransmission of digital information, e.g. telegraphic communication1%
H04NPictorial communication, e.g. television1%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1%
PatentTitleYear
10,929,062Gradually throttling memory due to dynamic thermal conditions202110,831,539Hardware thread switching for scheduling policy in a processor202010,776,143Techniques for utilizing a resource fold factor in placement of physical resources for a virtual machine202010,740,127Techniques for utilizing a resource fold factor in placement of physical resources for a virtual machine202010,740,234Virtual processor cache reuse202010,572,411Preventing software thread blocking due to interrupts202010,540,206Dynamic virtual processor manager202010,394,607Prioritization of low active thread count virtual machines in virtualized computing environment201910,394,608Prioritization of low active thread count virtual machines in virtualized computing environment201910,108,453Averting lock contention associated with core-based hardware threading in a split core environment201810,102,037Averting lock contention associated with core-based hardware threading in a split core environment201810,019,391Preventing software thread blocking due to interrupts201810,019,392Preventing software thread blocking due to interrupts20189,996,393Dynamic virtual processor manager20189,928,157'Filtering multiple in-memory trace buffers for event ranges before dumping from memory'20189,886,077'Processor management via thread status'20189,760,491'Optimized use of hardware micro partition prefetch based on software thread usage'20179,753,763'Prioritization of low active thread count virtual machines in virtualized computing environment'20179,753,760'Prioritization of low active thread count virtual machines in virtualized computing environment'20179,646,044'Increase database performance by reducing required communications and information transfers'20179,633,070'Increase database performance by reducing required communications and information transfers'20179,619,393'Optimized use of hardware micro partition prefetch based on software thread usage'20179,571,374'Dynamically allocating compute nodes among cloud groups based on priority and policies'20179,569,364'Multiple history based micro partition prefetch optimization'20179,465,807'Management of file cache'20169,460,101'Management of file cache'20169,354,926'Processor management via thread status'20169,354,934'Partitioned shared processor interrupt-intensive task segregator'20169,250,947'Determining placement fitness for partitions under a hypervisor'20169,208,089'Selective release-behind of pages based on repaging history in an information handling system'20159,195,601'Selective release-behind of pages based on repaging history in an information handling system'20159,158,668'System and program product to allocate and reallocate CPU resources needed to utilize full available network adapter bandwidth capacity for logical partition migration'20159,110,779'Allocate and reallocate CPU resources needed to utilize full available network adapter bandwidth capacity for logical partition migration'20159,104,453'Determining placement fitness for partitions under a hypervisor'20159,038,084'Managing utilization of physical processors of a shared processor pool in a virtualized processor environment'20158,972,669'Page buffering in a virtualized, memory sharing configuration'20158,973,007'Adaptive lock list searching of waiting threads'20158,954,974'Adaptive lock list searching of waiting threads'20158,935,700'Efficient lock hand-off in a symmetric multiprocessor system'20158,930,952'Efficient lock hand-off in a symmetric multiprocessing system'20158,930,670'Partition redispatching using page tracking'20158,850,402'Determining performance of a software entity'20148,832,383'Delayed replacement of TLB entries'20148,775,749'Demand based memory management of non-pagable data storage'20148,689,222'Controlling priority of multi-threaded hardware resources by system calls'20148,639,909'Management of low-paging space conditions in an operating system'20148,607,239'Lock mechanism to reduce waiting of threads to access a shared resource by selectively granting access to a thread before an enqueued highest priority thread'20138,589,926'Adjusting processor utilization data in polling environments'20138,499,138'Demand-based memory management of non-pagable data storage'20138,489,824'Selective memory compression for multi-threaded applications'20138,473,684'Delayed replacement of cache entries'20138,468,289'Dynamic memory affinity reallocation after partition migration'20138,458,401'Demand based partitioning of microprocessor caches'20138,447,929'Demand based partitioning of microprocessor caches'20138,417,912'Management of low-paging space conditions in an operating system'20138,402,228'Page buffering in a virtualized, memory sharing configuration'20138,359,449'Prioritizing virtual real memory paging based on disk capabilities'20138,327,176'Optimizing power management in multicore virtual machine platforms by dynamically variable delay before switching processor cores into a low power state'20128,312,456'System and method for optimizing interrupt processing in virtualized environments'20128,307,188'Information handling system memory management'20128,271,989'Method and apparatus for virtual processor dispatching to a partition based on shared memory pages'20128,245,236'Lock based moving of threads in a shared processor partitioning environment'20128,195,879'Demand based partitioning of microprocessor caches'20128,156,498'Optimization of thread wake up for shared processor partitions'20128,141,083'Method, apparatus, and computer program product for providing a self-tunable parameter used for dynamically yielding an idle processor'20128,122,167'Polling in a virtualized information handling system'20128,108,866'Heuristic based affinity dispatching for shared processor partition dispatching'20128,104,036'Measuring processor use in a hardware multithreading processor environment'20128,024,728'Virtual machine dispatching to maintain memory affinity'20117,870,551'Optimization of thread wake up for shared processor partitions'20117,865,895'Heuristic based affinity dispatching for shared processor partition dispatching'20117,827,380'Method and apparatus for supporting shared library text replication across a fork system call'20107,555,753'Measuring processor use in a hardware multithreading processor environment'20097,543,161'Method and apparatus for tracking variable speed microprocessor performance caused by power management in a logically partitioned data processing system'20097,469,331'Method and apparatus for supporting shared library text replication across a fork system call'20087,460,122'Method for graphical display of CPU utilization'20087,240,177'System and method for improving performance of dynamic memory removals by reducing file cache size'20076,845,504'Method and system for managing lock contention in a computer system'20056,708,296'Method and system for selecting and distinguishing an event sequence using an effective address in a processing system'20046,598,143'Method to increase performance of acquiring free memory pages'20036,339,818'Method and system for dynamically locating frequently accessed memory regions or locations'20025,809,548'System and method for zeroing pages with cache line invalidate instructions in an LRU system having data cache with time tags'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2021Patents assigned to IBM (82)· patent assignee history
1998–2021Based in Austin, TX, US· patent location history
2012–2016Patents assigned to OLSZEWSKI BRET R (17)· patent assignee history
2012–2016Patents assigned to OLSZEWSKI BRET RONALD (15)· patent assignee history
2012–2016Patents assigned to MICHEL DIRK (11)· patent assignee history
2012–2015Patents assigned to ANAND VAIJAYANTHIMALA K (9)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 82 | 1998–2021 |
| OLSZEWSKI BRET Rself | 17 | 2012–2016 |
| OLSZEWSKI BRET RONALDself | 15 | 2012–2016 |
| MICHEL DIRK | 11 | 2012–2016 |
| ANAND VAIJAYANTHIMALA K | 9 | 2012–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 82 | 1998–2021 |