Inventor

Xinmin Tian

Inventor
Union City, CA, US

Overview

32→
Patents
2008–2021
Patent span
Physics
Primary field (CPC G)

Patents· 32 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing91%
B01DSeparation3%
B01JChemical or physical processes, e.g. catalysis or colloid chemistry3%
C01BNon-metallic elements3%
PatentTitleYear
10,940,462Vanadium-based catalyst and preparation method therefor202110,877,910Programmable event driven yield mechanism which may activate other threads202010,795,682Generating vector based selection control statements202010,776,093Vectorize store instructions method and apparatus202010,642,587Technologies for indirectly calling vector functions202010,459,858Programmable event driven yield mechanism which may activate other threads201910,452,403Mechanism for instruction set based thread execution on a plurality of instruction sequencers20199,990,206Mechanism for instruction set based thread execution of a plurality of instruction sequencers20189,910,796'Programmable event driven yield mechanism which may activate other threads'20189,720,697'Mechanism for instruction set based thread execution on a plurality of instruction sequencers'20179,069,605'Mechanism to schedule threads on OS-sequestered sequencers without operating system intervention'20159,015,688'Vectorization of scalar functions including vectorization annotations and vectorized function signatures matching'20159,009,689'Speculative compilation to generate advice messages'20158,868,887'Programmable event driven yield mechanism which may activate other threads'20148,793,675'Loop parallelization based on loop splitting or index array'20148,719,819'Mechanism for instruction set based thread execution on a plurality of instruction sequencers'20148,612,949'Methods and apparatuses for compiler-creating helper threads for multi-threading'20138,607,235'Mechanism to schedule threads on OS-sequestered sequencers without operating system intervention'20138,589,901'Speculative region-level loop optimizations'20138,245,244'Device, system, and method of executing a call to a routine within a transaction'20128,205,200'Compiler-based scheduling optimization hints for user-level threads'20128,037,465'Thread-data affinity optimization using compiler'20117,984,431'Method and apparatus for exploiting thread-level parallelism'20117,941,791'Programming environment for heterogeneous processor resource integration'20117,882,498'Method, system, and program of a compiler to parallelize source code'20117,657,880'Safe store for speculative helper threads'20107,603,546'System, method and apparatus for dependency chain processing'20097,571,301'Fast lock-free post-wait synchronization for exploiting parallelism on multi-core processors'20097,549,146'Apparatus, systems, and methods for execution-driven loop splitting and load-safe code hosting'20097,487,502'Programmable event driven yield mechanism which may activate other threads'20097,398,521'Methods and apparatuses for thread management of multi-threading'20087,328,433'Methods and apparatus for reducing memory latency in a software application'2008

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2008–2020Patents assigned to INTEL CORP (29)· patent assignee history
2008–2020Based in Union City, CA, US· patent location history
2010–2015Based in San Jose, CA, US· patent location history
2011–2017Patents assigned to TIAN XINMIN (12)· patent assignee history
2011–2017Patents assigned to WANG HONG (7)· patent assignee history
2011–2017Patents assigned to CHINYA GAUTHAM (4)· patent assignee history
2012–2017Patents assigned to SHEN JOHN (4)· patent assignee history
2020Based in Fremont, CA, US· patent location history
2021Based in Nanjing, CN· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP292008–2020
TIAN XINMINself122011–2017
WANG HONG72011–2017
CHINYA GAUTHAM42011–2017
SHEN JOHN42012–2017
Locations
LocationPatentsSpan
Union City, California, US272008–2020
San Jose, California, US32010–2015
Nanjing, CN12021
Fremont, California, US12020