Inventor
Joseph A. Petrosky, Jr.
Inventor
Lagrangeville, NY, US
Overview
Patents· 8 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores21%
H03KPulse technique21%
H10DInorganic electric semiconductor devices21%
G06FElectric digital data processing7%
H01FMagnets7%
H03FAmplifiers7%
H03JTuning resonant circuits7%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
PatentTitleYear
7,598,838'Variable inductor technique'20097,315,438'Technique to reduce ESD loading capacitance'20084,616,341'Directory memory system having simultaneous write and comparison data bypass capabilities'19864,462,091'Word group redundancy scheme'19844,053,873'Self-isolating cross-coupled sense amplifier latch circuit'19774,053,792'Low power complementary field effect transistor (CFET) logic circuit'19773,995,172'Enhancement-and depletion-type field effect transistors connected in parallel'19763,970,950'High common mode rejection differential amplifier utilizing enhancement depletion field effect transistors'1976Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1976–1986Patents assigned to IBM (6)· patent assignee history
1976–1977Based in Wappingers Falls, NY, US· patent location history
1984–2009Based in Lagrangeville, NY, US· patent location history
2008–2009Patents assigned to SEIKO EPSON CORP (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 6 | 1976–1986 |
| SEIKO EPSON CORP | 2 | 2008–2009 |
Locations
| Location | Patents | Span |
|---|---|---|
| Lagrangeville, New York, US | 4 | 1984–2009 |
| Wappingers Falls, New York, US | 4 | 1976–1977 |