Inventor
Zhihai Wang
Inventor
Sunnyvale, CA, US
Overview
Patents· 42 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1029%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1017%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation14%
G01JMeasurement of intensity, velocity, spectral content, polarisation, phase or pulse characteristics of infrared, visible or ultraviolet light7%
H01LSemiconductor devices5%
C23CCoating metallic material4%
H10DInorganic electric semiconductor devices4%
G02BOptical elements, systems or apparatus3%
H04WWireless communication networks3%
G01SRadio direction-finding2%
PatentTitleYear
9,472,696'Light sensor having a contiguous IR suppression filter and transparent substrate'20169,472,586'Light sensor having transparent substrate and through-substrate vias and a contiguous IR suppression filter'20169,224,884'Light sensor having transparent substrate and diffuser formed therein'20159,224,890'Light sensor having transparent substrate with lens formed therein'20159,129,874'Light sensor having IR cut interference filter with color filter integrated on-chip'20159,112,716'Method and system for obtaining access information and charging in multimedia broadcast/multicast service'20159,078,119'Method and system for acquiring information of machine type communication user equipment'20158,948,087'Method and system for implementing domain selection during the terminated call'20158,809,099'Light sensor having IR cut interference filter with color filter integrated on-chip'20148,803,270'Light sensor having IR cut and color pass interference filter integrated on-chip'20148,803,068'Light sensor having a contiguous IR suppression filter and a transparent substrate'20148,791,404'Light sensor having a transparent substrate, a contiguous IR suppression filter and through-substrate vias'20148,779,540'Light sensor having transparent substrate with lens formed therein'20148,749,007'Light sensor having transparent substrate and diffuser formed therein'20148,624,341'Light sensor having IR cut and color pass interference filter integrated on-chip'20148,598,672'Light sensor having IR cut interference filter with color filter integrated on-chip'20137,413,984'Multi-step process for forming a barrier film for use in copper layer formation'20087,259,462'Interconnect dielectric tuning'20077,229,923'Multi-step process for forming a barrier film for use in copper layer formation'20077,081,406'Interconnect dielectric tuning'20066,893,962'Low via resistance system'20056,881,664'Process for planarizing upper surface of damascene wiring structure for integrated circuit structures'20056,767,832'In situ liner barrier'20046,736,953'High frequency electrochemical deposition'20046,734,560'Diamond barrier layer'20046,727,177'Multi-step process for forming a barrier film for use in copper layer formation'20046,569,751'Low via resistance system'20036,518,193'Substrate processing system'20036,489,231'Method for forming barrier and seed layer'20026,472,314'Diamond barrier layer'20026,368,979'Process for forming trenches and vias in layers of low dielectric constant carbon-doped silicon oxide dielectric material of an integrated circuit structure'20026,204,550'Method and composition for reducing gate oxide damage during RF sputter clean'20016,174,798'Process for forming metal interconnect stack for integrated circuit structure'20016,087,726'Metal interconnect stack for integrated circuit structure'20006,028,015'Process for treating damaged surfaces of low dielectric constant organo silicon oxide insulation material to inhibit moisture absorption'20006,010,952'Process for forming metal silicide contacts using amorphization of exposed silicon while minimizing device degradation'20005,994,211'Method and composition for reducing gate oxide damage during RF sputter clean'19995,902,129'Process for forming improved cobalt silicide layer on integrated circuit structure using two capping layers'19995,874,342'Process for forming MOS device in integrated circuit structure using cobalt silicide contacts as implantation media'19995,770,520'Method of making a barrier layer for via or contact opening of integrated circuit structure'19985,660,682'Plasma clean with hydrogen gas'19975,364,186'Apparatus and method for monitoring a temperature using a thermally fused composite ceramic blackbody temperature probe'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994Based in Beaverton, OR, US· patent location history
1997–2006Patents assigned to LSI LOGIC CORP (22)· patent assignee history
1997Based in Santa Clara, CA, US· patent location history
1998–2016Based in Sunnyvale, CA, US· patent location history
2013–2016Patents assigned to MAXIM INTEGRATED PRODUCTS (13)· patent assignee history
2013–2015Patents assigned to WANG ZHIHAI (9)· patent assignee history
2014Patents assigned to JONES JOY T (4)· patent assignee history
2014Patents assigned to KERNESS NICOLE D (4)· patent assignee history
2015Based in Shenzhen, CN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| LSI LOGIC CORP | 22 | 1997–2006 |
| MAXIM INTEGRATED PRODUCTS | 13 | 2013–2016 |
| WANG ZHIHAIself | 9 | 2013–2015 |
| JONES JOY T | 4 | 2014 |
| KERNESS NICOLE D | 4 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Sunnyvale, California, US | 37 | 1998–2016 |
| Shenzhen, CN | 3 | 2015 |
| Santa Clara, California, US | 1 | 1997 |
| Beaverton, OR, US | 1 | 1994 |