Inventor
HUNG-LING SHIH
Inventor
TW
Overview
Patents· 25 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices21%
H10DInorganic electric semiconductor devices20%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
H10BElectronic memory devices17%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
G11CStatic stores10%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation4%
PatentTitleYear
12,396,272Stilted pad structure202512,277,977ONON sidewall structure for memory device and method for making the same202512,266,577Deep trench isolation structure and method of making the same202512,211,906Method for eliminating divot formation and semiconductor device manufactured using the same202512,176,266Through-substrate via formation to enlarge electrochemical plating window202412,159,803Profile of deep trench isolation structure for isolation of high-voltage devices202412,101,931Strap-cell architecture for embedded memory202412,096,629Floating gate test structure for embedded memory device202412,068,032Device-region layout for embedded flash202412,009,033ONON sidewall structure for memory device and method for making the same202411,869,951Control gate strap layout to improve a word line etch process window202411,862,535Through-substrate-via with reentrant profile202411,854,621ONON sidewall structure for memory device and methods of making the same202311,830,765Method of forming a deep trench isolation structure for isolation of high-voltage devices202311,812,608Semiconductor device and manufacturing method thereof202311,785,770Strap-cell architecture for embedded memory202311,737,267Floating gate test structure for embedded memory device202311,699,488Device-region layout for embedded flash202311,670,689Method for eliminating divot formation and semiconductor device manufactured using the same202311,652,025Through-substrate via formation to enlarge electrochemical plating window202311,637,113Semiconductor device and manufacturing method thereof202311,552,087Strap-cell architecture for embedded memory202311,450,574Deep trench isolation structure and method of making the same202211,189,627Method to reduce kink effect in semiconductor devices202111,158,377Device-region layout for embedded flash2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2025Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (25)· patent assignee history
2021–2025Based in TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 25 | 2021–2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 25 | 2021–2025 |