Inventor
Yoshihiko Yagi
Inventor
Hyogo, JP
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1030%
H05KPrinted circuits20%
Y10TTechnical subjects covered by former us classification16%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
B23KSoldering or unsoldering3%
B33YAdditive manufacturing, i.e. manufacturing of three-dimensional [3d] objects by additive deposition, additive agglomeration or additive layering, e.g. by 3d printing, stereolithography or selective laser sintering3%
H01RElectrically-conductive connections3%
H04NPictorial communication, e.g. television3%
Y02PClimate change mitigation technologies in the production or processing of goods3%
B23DPlaning1%
PatentTitleYear
10,363,685Ingot cutting apparatus, and load detecting device used in ingot cutting apparatus20199,438,379'Communication device, communication program, communication method, and information processing device'20169,402,092'Communication device, communication program, and communication method'20168,809,693'Three-dimensional circuit board'20148,575,751'Conductive bump, method for producing the same, and electronic component mounted structure'20138,208,270'Substrate joining member and three-dimensional structure using the same'20128,159,829'Relay substrate, method for manufacturing the relay substrate and three-dimensional circuit device using the relay substrate'20128,134,081'Three-dimensional circuit board and its manufacturing method'20128,119,449'Method of manufacturing an electronic part mounting structure'20128,120,188'Electronic component mounting structure and method for manufacturing the same'20128,033,016'Method for manufacturing an electrode and electrode component mounted body'20118,018,731'Interconnect substrate and electronic circuit mounted structure'20117,928,566'Conductive bump, method for manufacturing the conductive bump, semiconductor device and method for manufacturing the semiconductor device'20117,845,954'Interconnecting board and three-dimensional wiring structure using it'20107,762,819'Substrate connecting member and connecting structure'20107,659,148'Bonding method and apparatus'20107,613,010'Stereoscopic electronic circuit device, and relay board and relay frame used therein'20097,071,090'Semiconductor element having protruded bump electrodes'20066,985,363'Card type recording medium and production method therefor'20066,966,964'Method and apparatus for manufacturing semiconductor device'20056,894,387'Semiconductor element having protruded bump electrodes'20056,787,922'Semiconductor chipmounting board'20046,651,320'Method for mounting semiconductor element to circuit board'20036,566,165'Method for mounting a semiconductor chip to a semiconductor chip-mounting board'20036,207,549'Method of forming a ball bond using a bonding capillary'20016,061,248'Semiconductor chip-mounting board providing a high bonding strength with a semiconductor chip mounted thereon'20005,686,353'Semiconductor device and manufacturing method thereof'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2006Patents assigned to MATSUSHITA ELECTRIC INDUSTRIAL CO LTD (10)· patent assignee history
1997–2009Based in Ashiya, JP· patent location history
2009–2019Patents assigned to PANASONIC CORP (15)· patent assignee history
2010–2014Based in Hyogo, JP· patent location history
2012–2014Patents assigned to YAGI YOSHIHIKO (7)· patent assignee history
2012–2014Patents assigned to SAKURAI DAISUKE (5)· patent assignee history
2013Based in Kanagawa, JP· patent location history
2016Patents assigned to HITACHI INFORMATION & TELECOMMUNICATION ENG LTD (2)· patent assignee history
2016Based in Yokohama, JP· patent location history
2019Based in Kadoma, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| PANASONIC CORP | 15 | 2009–2019 |
| MATSUSHITA ELECTRIC INDUSTRIAL CO LTD | 10 | 1997–2006 |
| YAGI YOSHIHIKOself | 7 | 2012–2014 |
| SAKURAI DAISUKE | 5 | 2012–2014 |
| HITACHI INFORMATION & TELECOMMUNICATION ENG LTD | 2 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hyogo, JP | 11 | 2010–2014 |
| Ashiya, JP | 11 | 1997–2009 |
| Yokohama, JP | 2 | 2016 |
| Kadoma, JP | 1 | 2019 |
| Kanagawa, JP | 1 | 2013 |